diff options
| author | Steve French <sfrench@us.ibm.com> | 2011-01-10 02:18:16 +0300 |
|---|---|---|
| committer | Steve French <sfrench@us.ibm.com> | 2011-01-10 02:18:16 +0300 |
| commit | acc6f11272ce4f77c40b1a6292eb198fd6aaf8c3 (patch) | |
| tree | 2da3a61b6726707a89f1cf93446aabd2fb00e1f0 /arch/arm/mach-omap2/clkt2xxx_apll.c | |
| parent | 7e12eddb73d4f288b0339ee13832a34d6bc4fd90 (diff) | |
| parent | 0c21e3aaf6ae85bee804a325aa29c325209180fd (diff) | |
| download | linux-acc6f11272ce4f77c40b1a6292eb198fd6aaf8c3.tar.xz | |
Merge branch 'master' of /pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
fs/cifs/dir.c
Diffstat (limited to 'arch/arm/mach-omap2/clkt2xxx_apll.c')
| -rw-r--r-- | arch/arm/mach-omap2/clkt2xxx_apll.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-omap2/clkt2xxx_apll.c b/arch/arm/mach-omap2/clkt2xxx_apll.c index 66e01acfd585..f51cffd1fc53 100644 --- a/arch/arm/mach-omap2/clkt2xxx_apll.c +++ b/arch/arm/mach-omap2/clkt2xxx_apll.c @@ -26,7 +26,7 @@ #include "clock.h" #include "clock2xxx.h" -#include "cm.h" +#include "cm2xxx_3xxx.h" #include "cm-regbits-24xx.h" /* CM_CLKEN_PLL.EN_{54,96}M_PLL options (24XX) */ @@ -49,14 +49,14 @@ static int omap2_clk_apll_enable(struct clk *clk, u32 status_mask) apll_mask = EN_APLL_LOCKED << clk->enable_bit; - cval = cm_read_mod_reg(PLL_MOD, CM_CLKEN); + cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); if ((cval & apll_mask) == apll_mask) return 0; /* apll already enabled */ cval &= ~apll_mask; cval |= apll_mask; - cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); + omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); omap2_cm_wait_idlest(cm_idlest_pll, status_mask, OMAP24XX_CM_IDLEST_VAL, clk->name); @@ -83,9 +83,9 @@ static void omap2_clk_apll_disable(struct clk *clk) { u32 cval; - cval = cm_read_mod_reg(PLL_MOD, CM_CLKEN); + cval = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKEN); cval &= ~(EN_APLL_LOCKED << clk->enable_bit); - cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); + omap2_cm_write_mod_reg(cval, PLL_MOD, CM_CLKEN); } /* Public data */ @@ -106,7 +106,7 @@ u32 omap2xxx_get_apll_clkin(void) { u32 aplls, srate = 0; - aplls = cm_read_mod_reg(PLL_MOD, CM_CLKSEL1); + aplls = omap2_cm_read_mod_reg(PLL_MOD, CM_CLKSEL1); aplls &= OMAP24XX_APLLS_CLKIN_MASK; aplls >>= OMAP24XX_APLLS_CLKIN_SHIFT; |