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authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>2013-06-06 14:24:28 +0400
committerJason Cooper <jason@lakedaemon.net>2013-06-13 21:48:40 +0400
commit580ff0eea15c341d17d564f7e5c519df37033d8e (patch)
treef3572705e6f41aab6d06fae867ed266ab7fbb0cc /arch/arm/mach-mvebu/coherency.c
parent488275beda149fe5cffdf5aa457344aa619d54f1 (diff)
downloadlinux-580ff0eea15c341d17d564f7e5c519df37033d8e.tar.xz
arm: mvebu: don't hardcode a physical address in headsmp.S
Now that the coherency_init() function is called a bit earlier, we can actually read the physical address of the coherency unit registers from the Device Tree, and communicate that to the headsmp.S code, which avoids hardcoding a physical address. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Will Deacon <will.deacon@arm.com> Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/mach-mvebu/coherency.c')
-rw-r--r--arch/arm/mach-mvebu/coherency.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index d74794a590f1..32fcf69f4202 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -25,8 +25,10 @@
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <asm/smp_plat.h>
+#include <asm/cacheflush.h>
#include "armada-370-xp.h"
+unsigned long __cpuinitdata coherency_phys_base;
static void __iomem *coherency_base;
static void __iomem *coherency_cpu_base;
@@ -124,7 +126,17 @@ int __init coherency_init(void)
np = of_find_matching_node(NULL, of_coherency_table);
if (np) {
+ struct resource res;
pr_info("Initializing Coherency fabric\n");
+ of_address_to_resource(np, 0, &res);
+ coherency_phys_base = res.start;
+ /*
+ * Ensure secondary CPUs will see the updated value,
+ * which they read before they join the coherency
+ * fabric, and therefore before they are coherent with
+ * the boot CPU cache.
+ */
+ sync_cache_w(&coherency_phys_base);
coherency_base = of_iomap(np, 0);
coherency_cpu_base = of_iomap(np, 1);
set_cpu_coherent(cpu_logical_map(smp_processor_id()), 0);