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| author | Olof Johansson <olof@lixom.net> | 2012-09-17 04:57:00 +0400 |
|---|---|---|
| committer | Olof Johansson <olof@lixom.net> | 2012-09-17 05:03:50 +0400 |
| commit | 591346c9d172daeba44ae8cbe2f9dcb7aa266811 (patch) | |
| tree | a5d6977f19116bd11f2fa869d071226c8cd50cd0 /arch/arm/mach-msm/platsmp.c | |
| parent | bada1c5b49e4a66014f919b4bd95fca9dd3d04bd (diff) | |
| parent | 0607fa5884f1759b396a0e1c07be561515daddc8 (diff) | |
| download | linux-591346c9d172daeba44ae8cbe2f9dcb7aa266811.tar.xz | |
Merge tag 'msm-dt-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/dt
From David Brown:
These patches migrate both the 8660 and 8960 targets on msm to be
devicetree only. This also sets most of the frame in place necessary
to build both targets into the same image.
There's a couple of cleanups in here that are kept in this series
because they are intimately tied to the changes necessary to support
the devicetree conversions.
By Stephen Boyd
via David Brown
* tag 'msm-dt-for-3.7' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm:
ARM: msm: Remove non-DT targets from 8960
ARM: msm: Add DT support for 8960
ARM: msm: Move io mapping prototypes to common.h
ARM: msm: Rename board-msm8x60 to signify its DT only status
ARM: msm: Make 8660 a DT only target
ARM: msm: Move 8660 to DT timer
ARM: msm: Add DT support to msm_timer
ARM: msm: Allow timer.c to compile on multiple targets
ARM: msm: Don't touch GIC registers outside of GIC code
ARM: msm: Add msm8660-surf.dts to Makefile.boot
ARM: msm: Add handle_irq handler for 8660 DT machine
Resolved trivial context conflict in arch/arm/mach-msm/io.c and a
remove/change conflict in arch/arm/mach-msm/board-msm8x60.c.
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mach-msm/platsmp.c')
| -rw-r--r-- | arch/arm/mach-msm/platsmp.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c index e012dc8391cf..2d791e6b4ad1 100644 --- a/arch/arm/mach-msm/platsmp.c +++ b/arch/arm/mach-msm/platsmp.c @@ -22,17 +22,12 @@ #include <asm/mach-types.h> #include <asm/smp_plat.h> -#include <mach/msm_iomap.h> - #include "scm-boot.h" #define VDD_SC1_ARRAY_CLAMP_GFS_CTL 0x15A0 #define SCSS_CPU1CORE_RESET 0xD80 #define SCSS_DBG_STATUS_CORE_PWRDUP 0xE64 -/* Mask for edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */ -#define GIC_PPI_EDGE_MASK 0xFFFFD7FF - extern void msm_secondary_startup(void); /* * control for which core is the next to come out of the secondary @@ -50,9 +45,6 @@ static inline int get_core_count(void) void __cpuinit platform_secondary_init(unsigned int cpu) { - /* Configure edge-triggered PPIs */ - writel(GIC_PPI_EDGE_MASK, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4); - /* * if any interrupts are already enabled for the primary * core (e.g. timer irq), then they will not have been enabled |