diff options
| author | Lubomir Rintel <lkundrak@v3.sk> | 2019-05-16 09:19:37 +0300 |
|---|---|---|
| committer | Lubomir Rintel <lkundrak@v3.sk> | 2019-10-17 17:36:11 +0300 |
| commit | a9372a5fb20597a070d89f9402241d9012c0590f (patch) | |
| tree | fe6976cc2ff1acf337921bdfcedca4905fe4f26f /arch/arm/mach-mmp/time.c | |
| parent | 199c936e37f9ed1944a74b5beb96ea3e87025fbe (diff) | |
| download | linux-a9372a5fb20597a070d89f9402241d9012c0590f.tar.xz | |
ARM: mmp: add support for MMP3 SoC
Similar to MMP2, which this patch is based on. Known differencies from MMP2
are:
* Two PJ4B cores instead of one PJ4
* Tauros 3 L2 cache controller instead of Tauros 2
* A GIC interrupt controller optionally used instead of the MMP one
* A TWD local timer
* Different USB2 PHY
* A USB3 SS controller
* More interrupt muxes
Hard to tell what else is different, because documentation is not
available.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Diffstat (limited to 'arch/arm/mach-mmp/time.c')
| -rw-r--r-- | arch/arm/mach-mmp/time.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 3f6fd0be0051..8f4cacbf640e 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c @@ -155,7 +155,8 @@ static void __init timer_config(void) __raw_writel(0x0, mmp_timer_base + TMR_CER); /* disable */ - ccr &= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : + ccr &= (cpu_is_mmp2() || cpu_is_mmp3()) ? + (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : (TMR_CCR_CS_0(3) | TMR_CCR_CS_1(3)); __raw_writel(ccr, mmp_timer_base + TMR_CCR); |