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author | Lubomir Rintel <lkundrak@v3.sk> | 2019-06-27 01:10:25 +0300 |
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committer | Lubomir Rintel <lkundrak@v3.sk> | 2019-10-17 17:36:10 +0300 |
commit | e69fd5090dbd640a12b61feef78eb07a17cec209 (patch) | |
tree | 20af2a8013a91e058639c1bb4f286f9418f90236 /arch/arm/mach-mmp/addr-map.h | |
parent | df8bf2d8a02082aba00dfbe6b93573fb008939d0 (diff) | |
download | linux-e69fd5090dbd640a12b61feef78eb07a17cec209.tar.xz |
ARM: mmp: map the PGU as well
The MMP2 and later includes a system control unit in this area. We'll need
that to initialize the secondary core on MMP3.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Diffstat (limited to 'arch/arm/mach-mmp/addr-map.h')
-rw-r--r-- | arch/arm/mach-mmp/addr-map.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/mach-mmp/addr-map.h b/arch/arm/mach-mmp/addr-map.h index 25edf6a92276..3dc2f0b0ecba 100644 --- a/arch/arm/mach-mmp/addr-map.h +++ b/arch/arm/mach-mmp/addr-map.h @@ -20,6 +20,10 @@ #define AXI_VIRT_BASE IOMEM(0xfe200000) #define AXI_PHYS_SIZE 0x00200000 +#define PGU_PHYS_BASE 0xe0000000 +#define PGU_VIRT_BASE IOMEM(0xfe400000) +#define PGU_PHYS_SIZE 0x00100000 + /* Static Memory Controller - Chip Select 0 and 1 */ #define SMC_CS0_PHYS_BASE 0x80000000 #define SMC_CS0_PHYS_SIZE 0x10000000 @@ -38,4 +42,7 @@ #define CIU_VIRT_BASE (AXI_VIRT_BASE + 0x82c00) #define CIU_REG(x) (CIU_VIRT_BASE + (x)) +#define SCU_VIRT_BASE (PGU_VIRT_BASE) +#define SCU_REG(x) (SCU_VIRT_BASE + (x)) + #endif /* __ASM_MACH_ADDR_MAP_H */ |