diff options
| author | Jaecheol Lee <jc.lee@samsung.com> | 2011-07-18 14:25:03 +0400 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-07-20 18:38:37 +0400 |
| commit | f4ba4b01ef28100070608d915feda173d2a61c0c (patch) | |
| tree | 01334b5df48081ef257a74bb417b1ac17ee4a063 /arch/arm/mach-exynos4/pm.c | |
| parent | 12974e9f707888044a3af3a12ebdebf0a509a1fa (diff) | |
| download | linux-f4ba4b01ef28100070608d915feda173d2a61c0c.tar.xz | |
ARM: EXYNOS4: Add save/restore for other ARM registers
This patch adds save/restore values for Power Control Register and
Diagnostic Register for PM.
Signed-off-by: Jaecheol Lee <jc.lee@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/pm.c')
| -rw-r--r-- | arch/arm/mach-exynos4/pm.c | 26 |
1 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos4/pm.c b/arch/arm/mach-exynos4/pm.c index aa27b90068c0..e978e76beed7 100644 --- a/arch/arm/mach-exynos4/pm.c +++ b/arch/arm/mach-exynos4/pm.c @@ -207,7 +207,10 @@ static struct sleep_save exynos4_l2cc_save[] = { SAVE_ITEM(S5P_VA_L2CC + L2X0_AUX_CTRL), }; -void exynos4_cpu_suspend(void) +/* For Cortex-A9 Diagnostic and Power control register */ +static unsigned int save_arm_register[2]; + +void exynos4_cpu_suspend(unsigned long arg) { outer_flush_all(); @@ -301,6 +304,16 @@ static int exynos4_pm_suspend(void) tmp &= ~S5P_CENTRAL_LOWPWR_CFG; __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); + /* Save Power control register */ + asm ("mrc p15, 0, %0, c15, c0, 0" + : "=r" (tmp) : : "cc"); + save_arm_register[0] = tmp; + + /* Save Diagnostic register */ + asm ("mrc p15, 0, %0, c15, c0, 1" + : "=r" (tmp) : : "cc"); + save_arm_register[1] = tmp; + return 0; } @@ -321,6 +334,17 @@ static void exynos4_pm_resume(void) /* No need to perform below restore code */ goto early_wakeup; } + /* Restore Power control register */ + tmp = save_arm_register[0]; + asm volatile ("mcr p15, 0, %0, c15, c0, 0" + : : "r" (tmp) + : "cc"); + + /* Restore Diagnostic register */ + tmp = save_arm_register[1]; + asm volatile ("mcr p15, 0, %0, c15, c0, 1" + : : "r" (tmp) + : "cc"); /* For release retention */ |