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authorKukjin Kim <kgene.kim@samsung.com>2011-10-04 15:20:21 +0400
committerKukjin Kim <kgene.kim@samsung.com>2011-10-04 15:20:21 +0400
commita1a9107deff9b9e5c615058834b74717fa87d49c (patch)
tree70686e34b8676a812a5cc63059e4ae8343ee1df1 /arch/arm/mach-exynos4/clock.c
parent86f82da586098f16d92b5637808c323f5455e935 (diff)
parent31451afd2480caf3ae15da56cf9fc3cb3fb821cb (diff)
downloadlinux-a1a9107deff9b9e5c615058834b74717fa87d49c.tar.xz
Merge branch 'next-samsung-board-2' into next-samsung-devel-2
Diffstat (limited to 'arch/arm/mach-exynos4/clock.c')
-rw-r--r--arch/arm/mach-exynos4/clock.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index a25c81836759..db616916d7a4 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -1283,7 +1283,7 @@ static unsigned long exynos4_fout_apll_get_rate(struct clk *clk)
if (soc_is_exynos4210())
return s5p_get_pll45xx(xtal_rate, __raw_readl(S5P_APLL_CON0),
pll_4508);
- else if (soc_is_exynos4212())
+ else if (soc_is_exynos4212() || soc_is_exynos4412())
return s5p_get_pll35xx(xtal_rate, __raw_readl(S5P_APLL_CON0));
else
return 0;
@@ -1399,7 +1399,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
__raw_readl(S5P_VPLL_CON1), pll_4650c);
- } else if (soc_is_exynos4212()) {
+ } else if (soc_is_exynos4212() || soc_is_exynos4412()) {
apll = s5p_get_pll35xx(xtal, __raw_readl(S5P_APLL_CON0));
mpll = s5p_get_pll35xx(xtal, __raw_readl(S5P_MPLL_CON0));
epll = s5p_get_pll36xx(xtal, __raw_readl(S5P_EPLL_CON0),