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authorTomasz Figa <t.figa@samsung.com>2014-09-23 20:24:39 +0400
committerKukjin Kim <kgene.kim@samsung.com>2014-10-20 19:06:35 +0400
commit2b9d9c321b5900c7ce82110a81cf3827ca9b33c6 (patch)
tree6809b6da0bdbef8b2ddabf52c6dabc5ad6afdd9a /arch/arm/mach-exynos/sleep.S
parent9c261f89a30010a33c15e6b7cfc7c79ae6bea653 (diff)
downloadlinux-2b9d9c321b5900c7ce82110a81cf3827ca9b33c6.tar.xz
ARM: EXYNOS: Add support for firmware-assisted suspend/resume
On a numer of Exynos-based boards Linux kernel is running in non-secure mode under a secure firmware. This means that certain operations need to be handled in special way, with firmware assistance. System-wide suspend/resume is an example of such operations. This patch adds support for firmware-assisted suspend/resume by leveraging recently introduced suspend and resume firmware operations and modifying existing suspend/resume paths to account for presence of secure firmware. Signed-off-by: Tomasz Figa <t.figa@samsung.com> [kgene.kim@samsung.com: rebased] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/sleep.S')
-rw-r--r--arch/arm/mach-exynos/sleep.S28
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos/sleep.S b/arch/arm/mach-exynos/sleep.S
index 108a45f4bb62..e3c373082bbe 100644
--- a/arch/arm/mach-exynos/sleep.S
+++ b/arch/arm/mach-exynos/sleep.S
@@ -16,6 +16,7 @@
*/
#include <linux/linkage.h>
+#include "smc.h"
#define CPU_MASK 0xff0ffff0
#define CPU_CORTEX_A9 0x410fc090
@@ -55,3 +56,30 @@ ENTRY(exynos_cpu_resume)
#endif
b cpu_resume
ENDPROC(exynos_cpu_resume)
+
+ .align
+
+ENTRY(exynos_cpu_resume_ns)
+ mrc p15, 0, r0, c0, c0, 0
+ ldr r1, =CPU_MASK
+ and r0, r0, r1
+ ldr r1, =CPU_CORTEX_A9
+ cmp r0, r1
+ bne skip_cp15
+
+ adr r0, cp15_save_power
+ ldr r1, [r0]
+ adr r0, cp15_save_diag
+ ldr r2, [r0]
+ mov r0, #SMC_CMD_C15RESUME
+ dsb
+ smc #0
+skip_cp15:
+ b cpu_resume
+ENDPROC(exynos_cpu_resume_ns)
+ .globl cp15_save_diag
+cp15_save_diag:
+ .long 0 @ cp15 diagnostic
+ .globl cp15_save_power
+cp15_save_power:
+ .long 0 @ cp15 power control