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author | Florian Fainelli <florian@openwrt.org> | 2012-12-11 01:21:19 +0400 |
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committer | Ryan Mallon <rmallon@gmail.com> | 2012-12-12 04:22:56 +0400 |
commit | 210dce5faf89c9677ac1a6273bc53f130843539f (patch) | |
tree | 3264b007ed0677df29683975571daa89cbe463d5 /arch/arm/mach-exynos/dma.c | |
parent | ddffeb8c4d0331609ef2581d84de4d763607bd37 (diff) | |
download | linux-210dce5faf89c9677ac1a6273bc53f130843539f.tar.xz |
ARM: ep93xx: properly wait for UART FIFO to be empty
This patch changes the busy-waiting loop around in the decompressor
putc() function on the UART FIFO register. Without a proper wait, the
output of the decompressor was corrupted like this:
Uncompressing Linx. done, booting th enl
To highlight the issue more evidently, looping 100 times instead of 1000
makes the issue appear much faster. This patch takes the approach of
using an active while loop until the FIFO is empty (not FULL).
This issue happened to me on Sim.One running at 200Mhz.
Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ryan Mallon <rmallon@gmail.com>
Diffstat (limited to 'arch/arm/mach-exynos/dma.c')
0 files changed, 0 insertions, 0 deletions