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| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2017-09-17 19:45:20 +0300 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2017-10-29 18:29:30 +0300 |
| commit | 936a4174435b376557ee2610eae03592baeb9016 (patch) | |
| tree | b8d99a90ee1526defb468a57775f679dd4efa2b4 /arch/arm/kernel | |
| parent | 0606326effc66201223de26d71c2779a108ee452 (diff) | |
| download | linux-936a4174435b376557ee2610eae03592baeb9016.tar.xz | |
ARM: smp_scu: allow the platform code to read the SCU CPU status
On Amlogic Meson8 / Meson8m2 (both Cortex-A9) and Meson8b (Cortex-A5)
the CPU hotplug code needs to wait until the SCU status of the CPU that
is being taken offline is SCU_PM_POWEROFF.
Provide a utility function (which can be invoked for example from
.cpu_kill()) which allows reading the SCU status of a CPU.
While here, replace the magic number 0x3 with a preprocessor macro
(SCU_CPU_STATUS_MASK) so we don't have to duplicate this magic number in
the new function.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'arch/arm/kernel')
| -rw-r--r-- | arch/arm/kernel/smp_scu.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/arch/arm/kernel/smp_scu.c b/arch/arm/kernel/smp_scu.c index 1d549c16b5fc..c6b33074c393 100644 --- a/arch/arm/kernel/smp_scu.c +++ b/arch/arm/kernel/smp_scu.c @@ -21,6 +21,7 @@ #define SCU_STANDBY_ENABLE (1 << 5) #define SCU_CONFIG 0x04 #define SCU_CPU_STATUS 0x08 +#define SCU_CPU_STATUS_MASK GENMASK(1, 0) #define SCU_INVALIDATE 0x0c #define SCU_FPGA_REVISION 0x10 @@ -82,7 +83,8 @@ static int scu_set_power_mode_internal(void __iomem *scu_base, if (mode > 3 || mode == 1 || cpu > 3) return -EINVAL; - val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu) & ~0x03; + val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu); + val &= ~SCU_CPU_STATUS_MASK; val |= mode; writeb_relaxed(val, scu_base + SCU_CPU_STATUS + cpu); @@ -109,3 +111,17 @@ int scu_cpu_power_enable(void __iomem *scu_base, unsigned int cpu) { return scu_set_power_mode_internal(scu_base, cpu, SCU_PM_NORMAL); } + +int scu_get_cpu_power_mode(void __iomem *scu_base, unsigned int logical_cpu) +{ + unsigned int val; + int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(logical_cpu), 0); + + if (cpu > 3) + return -EINVAL; + + val = readb_relaxed(scu_base + SCU_CPU_STATUS + cpu); + val &= SCU_CPU_STATUS_MASK; + + return val; +} |