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| author | Al Viro <viro@zeniv.linux.org.uk> | 2014-06-12 08:27:11 +0400 |
|---|---|---|
| committer | Al Viro <viro@zeniv.linux.org.uk> | 2014-06-12 08:28:09 +0400 |
| commit | 9c1d5284c79fea050f115eadeec1dd1758e5c630 (patch) | |
| tree | 4d16fd5aad7ff4931e985c0128c5747f23561f8a /arch/arm/kernel/entry-header.S | |
| parent | 5f073850602084fbcbb987948ff3e70ae273f7d2 (diff) | |
| parent | 9f12600fe425bc28f0ccba034a77783c09c15af4 (diff) | |
| download | linux-9c1d5284c79fea050f115eadeec1dd1758e5c630.tar.xz | |
Merge commit '9f12600fe425bc28f0ccba034a77783c09c15af4' into for-linus
Backmerge of dcache.c changes from mainline. It's that, or complete
rebase...
Conflicts:
fs/splice.c
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-header.S')
| -rw-r--r-- | arch/arm/kernel/entry-header.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index 1420725142ca..efb208de75ec 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S @@ -132,6 +132,10 @@ orrne r5, V7M_xPSR_FRAMEPTRALIGN biceq r5, V7M_xPSR_FRAMEPTRALIGN + @ ensure bit 0 is cleared in the PC, otherwise behaviour is + @ unpredictable + bic r4, #1 + @ write basic exception frame stmdb r2!, {r1, r3-r5} ldmia sp, {r1, r3-r5} |