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authorMarek Szyprowski <m.szyprowski@samsung.com>2016-12-09 10:22:11 +0300
committerKrzysztof Kozlowski <krzk@kernel.org>2016-12-28 20:26:57 +0300
commitf3a3a3bf7103faa0c6bd16a26caef0118fc58163 (patch)
tree17815333de5f73cc1fb5b30109e48e2f8b09d20a /arch/arm/boot
parent087ce39cdf4b0a95344ae18676017aacfe51b954 (diff)
downloadlinux-f3a3a3bf7103faa0c6bd16a26caef0118fc58163.tar.xz
ARM: dts: exynos: Fix initial audio clocks configuration on Exynos4 boards
Move assigned clocks properties from sound node to audio subsystem clock controller node. This way clocks topology and rates are set just after probing audio clocks controller. Leaving those properties under sound node doesn't guarantee to configure them before they are being used (for example i2s hardware module can be probed in parallel and it also require proper audio clocks configuration). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/exynos4412-itop-elite.dts21
-rw-r--r--arch/arm/boot/dts/exynos4412-odroid-common.dtsi20
2 files changed, 20 insertions, 21 deletions
diff --git a/arch/arm/boot/dts/exynos4412-itop-elite.dts b/arch/arm/boot/dts/exynos4412-itop-elite.dts
index 1ac9129cd59b..d66093084dbb 100644
--- a/arch/arm/boot/dts/exynos4412-itop-elite.dts
+++ b/arch/arm/boot/dts/exynos4412-itop-elite.dts
@@ -82,17 +82,6 @@
compatible = "simple-audio-card";
simple-audio-card,name = "wm-sound";
- assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
- <&clock_audss EXYNOS_MOUT_I2S>,
- <&clock_audss EXYNOS_DOUT_SRP>,
- <&clock_audss EXYNOS_DOUT_AUD_BUS>;
- assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
- <&clock_audss EXYNOS_MOUT_AUDSS>;
- assigned-clock-rates = <0>,
- <0>,
- <112896000>,
- <11289600>;
-
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&link0_codec>;
simple-audio-card,frame-master = <&link0_codec>;
@@ -145,6 +134,16 @@
status = "okay";
};
+&clock_audss {
+ assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
+ <&clock_audss EXYNOS_MOUT_I2S>,
+ <&clock_audss EXYNOS_DOUT_SRP>,
+ <&clock_audss EXYNOS_DOUT_AUD_BUS>;
+ assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
+ <&clock_audss EXYNOS_MOUT_AUDSS>;
+ assigned-clock-rates = <0>, <0>, <112896000>, <11289600>;
+};
+
&ehci {
status = "okay";
/* In order to reset USB ethernet */
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index 7815efd5a52f..b6b0f509f07c 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -43,16 +43,6 @@
sound: sound {
compatible = "simple-audio-card";
- assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
- <&clock_audss EXYNOS_MOUT_I2S>,
- <&clock_audss EXYNOS_DOUT_SRP>,
- <&clock_audss EXYNOS_DOUT_AUD_BUS>;
- assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
- <&clock_audss EXYNOS_MOUT_AUDSS>;
- assigned-clock-rates = <0>,
- <0>,
- <192000000>,
- <19200000>;
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&link0_codec>;
@@ -157,6 +147,16 @@
status = "okay";
};
+&clock_audss {
+ assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
+ <&clock_audss EXYNOS_MOUT_I2S>,
+ <&clock_audss EXYNOS_DOUT_SRP>,
+ <&clock_audss EXYNOS_DOUT_AUD_BUS>;
+ assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
+ <&clock_audss EXYNOS_MOUT_AUDSS>;
+ assigned-clock-rates = <0>, <0>, <192000000>, <19200000>;
+};
+
&cpu0 {
cpu0-supply = <&buck2_reg>;
};