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| author | Daniel Palmer <daniel@0x0f.com> | 2020-12-01 16:43:28 +0300 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2020-12-09 19:45:40 +0300 |
| commit | 570e471ce0540165aed5bc638e462de7c1110a28 (patch) | |
| tree | 232b29334da0685428b85d21a7f9755f754457b4 /arch/arm/boot | |
| parent | 418cb58b45661724ba145bd769e53910ad9324b0 (diff) | |
| download | linux-570e471ce0540165aed5bc638e462de7c1110a28.tar.xz | |
ARM: mstar: Add smp ctrl registers to infinity2m dtsi
Add the smpctrl registers to the infinity2m dtsi so that the
second CPU can be enabled on chips in this family.
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Link: https://lore.kernel.org/r/20201201134330.3037007-9-daniel@0x0f.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/mstar-infinity2m.dtsi | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/mstar-infinity2m.dtsi b/arch/arm/boot/dts/mstar-infinity2m.dtsi index 02adb9fe9d3c..6d4d1d224e96 100644 --- a/arch/arm/boot/dts/mstar-infinity2m.dtsi +++ b/arch/arm/boot/dts/mstar-infinity2m.dtsi @@ -13,3 +13,10 @@ reg = <0x1>; }; }; + +&riu { + smpctrl: smpctrl@204000 { + reg = <0x204000 0x200>; + status = "disabled"; + }; +}; |