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authorMaxime Ripard <maxime.ripard@free-electrons.com>2017-01-23 13:41:51 +0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2017-01-27 18:18:16 +0300
commite7f68403f49e901732df3c02731b6e714cfbe417 (patch)
treee32d3131c4e4f8e58130301e7cac4be9b898582d /arch/arm/boot
parent01dc563b63e915d0eea05a2afb99bac7935d7dcb (diff)
downloadlinux-e7f68403f49e901732df3c02731b6e714cfbe417.tar.xz
ARM: sun8i: a23/a33: Enable the real LOSC and use it
So far, the LOSC was generated through the RTC internal oscillator, which was a pretty poor and inaccurate choice. Now that the RTC properly exposes its internal mux between its oscillator and the external oscillator, we can use it were relevant. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/sun8i-a23-a33.dtsi13
1 files changed, 8 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 597f2fce6c31..da7f2476bc6c 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -109,11 +109,11 @@
clock-output-names = "osc24M";
};
- osc32k: osc32k_clk {
+ ext_osc32k: ext_osc32k_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
- clock-output-names = "osc32k";
+ clock-output-names = "ext-osc32k";
};
};
@@ -256,7 +256,7 @@
ccu: clock@01c20000 {
reg = <0x01c20000 0x400>;
- clocks = <&osc24M>, <&osc32k>;
+ clocks = <&osc24M>, <&rtc 0>;
clock-names = "hosc", "losc";
#clock-cells = <1>;
#reset-cells = <1>;
@@ -266,7 +266,7 @@
/* compatible gets set in SoC specific dtsi file */
reg = <0x01c20800 0x400>;
/* interrupts get set in SoC specific dtsi file */
- clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+ clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
gpio-controller;
interrupt-controller;
@@ -486,6 +486,9 @@
reg = <0x01f00000 0x54>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+ clock-output-names = "osc32k";
+ clocks = <&ext_osc32k>;
+ #clock-cells = <1>;
};
nmi_intc: interrupt-controller@01f00c0c {
@@ -564,7 +567,7 @@
compatible = "allwinner,sun8i-a23-r-pinctrl";
reg = <0x01f02c00 0x400>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&apb0_gates 0>, <&osc24M>, <&osc32k>;
+ clocks = <&apb0_gates 0>, <&osc24M>, <&rtc 0>;
clock-names = "apb", "hosc", "losc";
resets = <&apb0_rst 0>;
gpio-controller;