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| author | Icenowy Zheng <icenowy@aosc.io> | 2017-12-22 15:22:37 +0300 |
|---|---|---|
| committer | Chen-Yu Tsai <wens@csie.org> | 2017-12-29 11:41:03 +0300 |
| commit | d8c6f1f0295cfab63e43cb6183a7440a460c056a (patch) | |
| tree | d0d9cb6eb1564a80631d56443e44e8e945ed39da /arch/arm/boot | |
| parent | fffa5274e5ffe837d5a03989e40013e3f42742f2 (diff) | |
| download | linux-d8c6f1f0295cfab63e43cb6183a7440a460c056a.tar.xz | |
ARM: sun8i: h3/h5: add DE2 CCU device node for H3
The DE2 in H3/H5 has a clock control unit in it, and the behavior is
slightly different between H3 and H5.
Add the common parts in H3/H5 DTSI, and add the compatible string in H3
DTSI.
The compatible string of H5 DE2 CCU will be added in a separated patch.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-h3.dtsi | 4 | ||||
| -rw-r--r-- | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 14 |
2 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi index b36f9f423c39..8495deecedad 100644 --- a/arch/arm/boot/dts/sun8i-h3.dtsi +++ b/arch/arm/boot/dts/sun8i-h3.dtsi @@ -85,6 +85,10 @@ compatible = "allwinner,sun8i-h3-ccu"; }; +&display_clocks { + compatible = "allwinner,sun8i-h3-de2-clk"; +}; + &mmc0 { compatible = "allwinner,sun7i-a20-mmc"; clocks = <&ccu CLK_BUS_MMC0>, diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 8d40c00d64bb..fcb909658cf0 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -40,9 +40,11 @@ * OTHER DEALINGS IN THE SOFTWARE. */ +#include <dt-bindings/clock/sun8i-de2.h> #include <dt-bindings/clock/sun8i-h3-ccu.h> #include <dt-bindings/clock/sun8i-r-ccu.h> #include <dt-bindings/interrupt-controller/arm-gic.h> +#include <dt-bindings/reset/sun8i-de2.h> #include <dt-bindings/reset/sun8i-h3-ccu.h> #include <dt-bindings/reset/sun8i-r-ccu.h> @@ -85,6 +87,18 @@ #size-cells = <1>; ranges; + display_clocks: clock@1000000 { + /* compatible is in per SoC .dtsi file */ + reg = <0x01000000 0x100000>; + clocks = <&ccu CLK_DE>, + <&ccu CLK_BUS_DE>; + clock-names = "mod", + "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + syscon: syscon@1c00000 { compatible = "allwinner,sun8i-h3-system-controller", "syscon"; |