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authorAdam Ford <aford173@gmail.com>2016-08-13 18:13:04 +0300
committerTony Lindgren <tony@atomide.com>2016-08-15 19:14:02 +0300
commita8771a6a64226c24f4baf30b8d13a2116795487f (patch)
treed9f87808466a82261232212fe506d2436c37aa31 /arch/arm/boot
parent153b58ea932b2d0642fa5cd41c93bb0555f3f09b (diff)
downloadlinux-a8771a6a64226c24f4baf30b8d13a2116795487f.tar.xz
ARM: dts: logicpd-torpedo-som: Provide NAND ready pin
This was applied to a variety of omap3 boards, so it should probably be applied here. I did not test NAND performance, but I tested this with UBI to confirm read/write didn't break. Signed-off-by: Adam Ford <aford173@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/logicpd-torpedo-som.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
index 5e9a13c0eaf7..1c2c74655416 100644
--- a/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
+++ b/arch/arm/boot/dts/logicpd-torpedo-som.dtsi
@@ -46,6 +46,7 @@
linux,mtd-name = "micron,mt29f4g16abbda3w";
nand-bus-width = <16>;
ti,nand-ecc-opt = "bch8";
+ rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;