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authorRashmica Gupta <rashmica.g@gmail.com>2019-08-22 10:13:15 +0300
committerJoel Stanley <joel@jms.id.au>2019-11-01 07:59:48 +0300
commit8dbcb5b709b9fbc0d6abdccc9e7803641fbff586 (patch)
treea1f2fec0611cf20345e5547f7b0a7be84ab28a0e /arch/arm/boot
parent311b57f051eac4dc56a4fa6295b14e48bac79487 (diff)
downloadlinux-8dbcb5b709b9fbc0d6abdccc9e7803641fbff586.tar.xz
ARM: dts: aspeed-g6: Add gpio devices
The AST2600 has 208 normal GPIO pins and 36 1.8V GPIOs. Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/aspeed-g6.dtsi26
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 7ca45b0ce3c3..e7ba75a35855 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -168,6 +168,32 @@
quality = <100>;
};
+ gpio0: gpio@1e780000 {
+ #gpio-cells = <2>;
+ gpio-controller;
+ compatible = "aspeed,ast2600-gpio";
+ reg = <0x1e780000 0x800>;
+ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 0 208>;
+ ngpios = <208>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ gpio1: gpio@1e780800 {
+ #gpio-cells = <2>;
+ gpio-controller;
+ compatible = "aspeed,ast2600-gpio";
+ reg = <0x1e780800 0x800>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-ranges = <&pinctrl 0 208 36>;
+ ngpios = <36>;
+ clocks = <&syscon ASPEED_CLK_APB1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
rtc: rtc@1e781000 {
compatible = "aspeed,ast2600-rtc";
reg = <0x1e781000 0x18>;