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| author | Amit Kucheria <amit.kucheria@linaro.org> | 2018-09-06 12:54:12 +0300 |
|---|---|---|
| committer | Andy Gross <andy.gross@linaro.org> | 2018-11-14 20:30:20 +0300 |
| commit | 58443fd91057f073306cbbfc9db3b6a292fd51e5 (patch) | |
| tree | 2533881331d74fbc7c8e7902215a4f1e36768907 /arch/arm/boot | |
| parent | 3c84c05b8b909cae497360a79766877995d2ec68 (diff) | |
| download | linux-58443fd91057f073306cbbfc9db3b6a292fd51e5.tar.xz | |
ARM: dts: msm8974: thermal: split address space into two
We've earlier added support to split the register address space into TM
and SROT regions. Split up the regmap address space into two for msm8974
that has a similar register layout.
Since tsens-common.c/init_common() currently only registers one address
space, the order is important (TM before SROT). This is OK since the
code doesn't really use the SROT functionality yet.
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Diffstat (limited to 'arch/arm/boot')
| -rw-r--r-- | arch/arm/boot/dts/qcom-msm8974.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index aba159d5a95a..35d3d5240996 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -427,9 +427,10 @@ }; }; - tsens: thermal-sensor@fc4a8000 { + tsens: thermal-sensor@fc4a9000 { compatible = "qcom,msm8974-tsens"; - reg = <0xfc4a8000 0x2000>; + reg = <0xfc4a9000 0x1000>, /* TM */ + <0xfc4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_calib>, <&tsens_backup>; nvmem-cell-names = "calib", "calib_backup"; #thermal-sensor-cells = <1>; |