diff options
author | Anson Huang <Anson.Huang@nxp.com> | 2018-08-31 10:53:18 +0300 |
---|---|---|
committer | Shawn Guo <shawnguo@kernel.org> | 2018-11-05 05:19:09 +0300 |
commit | 39db0e136b23b3c2318714013e97f6093e38229d (patch) | |
tree | 1d856c231aeb44f3f3ac6611c79f344e560b4492 /arch/arm/boot | |
parent | 46f3b54de80958f0246ffcb37a19fd3bf6c8cd04 (diff) | |
download | linux-39db0e136b23b3c2318714013e97f6093e38229d.tar.xz |
ARM: dts: imx6: add mmdc ipg clock
i.MX6 SoCs has MMDC clock gates in CCM CCGR, add
clock property for MMDC driver's clock operation.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r-- | arch/arm/boot/dts/imx6qdl.dtsi | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sl.dtsi | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sll.dtsi | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6sx.dtsi | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 1 |
5 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index e4daf150881a..f782dc020f5b 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -1115,6 +1115,7 @@ mmdc0: mmdc@21b0000 { /* MMDC0 */ compatible = "fsl,imx6q-mmdc"; reg = <0x021b0000 0x4000>; + clocks = <&clks IMX6QDL_CLK_MMDC_P0_IPG>; }; mmdc1: mmdc@21b4000 { /* MMDC1 */ diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 7a3ae7160c12..9bbc5b0adf85 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -921,6 +921,7 @@ mmdc: mmdc@21b0000 { compatible = "fsl,imx6sl-mmdc", "fsl,imx6q-mmdc"; reg = <0x021b0000 0x4000>; + clocks = <&clks IMX6SL_CLK_MMDC_P0_IPG>; }; rngb: rngb@21b4000 { diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi index ed9a980bce85..e462f76a1c01 100644 --- a/arch/arm/boot/dts/imx6sll.dtsi +++ b/arch/arm/boot/dts/imx6sll.dtsi @@ -770,6 +770,7 @@ mmdc: memory-controller@21b0000 { compatible = "fsl,imx6sll-mmdc", "fsl,imx6q-mmdc"; reg = <0x021b0000 0x4000>; + clocks = <&clks IMX6SLL_CLK_MMDC_P0_IPG>; }; ocotp: ocotp-ctrl@21bc000 { diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index 95a3c1cb877d..84b7687b2d31 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -1002,6 +1002,7 @@ mmdc: mmdc@21b0000 { compatible = "fsl,imx6sx-mmdc", "fsl,imx6q-mmdc"; reg = <0x021b0000 0x4000>; + clocks = <&clks IMX6SX_CLK_MMDC_P0_IPG>; }; fec2: ethernet@21b4000 { diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 083d3446c41d..c71d2d648c2e 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -917,6 +917,7 @@ mmdc: mmdc@21b0000 { compatible = "fsl,imx6ul-mmdc", "fsl,imx6q-mmdc"; reg = <0x021b0000 0x4000>; + clocks = <&clks IMX6UL_CLK_MMDC_P0_IPG>; }; weim: weim@21b8000 { |