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authorStefan Wahren <stefan.wahren@i2se.com>2018-02-25 17:10:53 +0300
committerEric Anholt <eric@anholt.net>2018-02-27 02:00:13 +0300
commita166ae400d703acb3a456e2974cc1ca4ad003487 (patch)
treec8478e1e6ed7ed163af51b3453742014eba94dbe /arch/arm/boot/dts
parent4d5b2eaf3ca80c56a59f230208c4ff11e3f68d55 (diff)
downloadlinux-a166ae400d703acb3a456e2974cc1ca4ad003487.tar.xz
ARM: dts: bcm283x: Apply pull settings to Zero W relevant groups
Instead of keeping the firmware's pull settings, we better apply them via the devicetree pin control. Start with the RPi Zero W relevant first to keep the effort low. Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/bcm283x.dtsi3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 781efd4349f6..b0d2dc04aa63 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -223,6 +223,7 @@
gpclk2_gpio43: gpclk2_gpio43 {
brcm,pins = <43>;
brcm,function = <BCM2835_FSEL_ALT0>;
+ brcm,pull = <BCM2835_PUD_OFF>;
};
i2c0_gpio0: i2c0_gpio0 {
@@ -335,10 +336,12 @@
uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
brcm,pins = <30 31>;
brcm,function = <BCM2835_FSEL_ALT3>;
+ brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
};
uart0_gpio32: uart0_gpio32 {
brcm,pins = <32 33>;
brcm,function = <BCM2835_FSEL_ALT3>;
+ brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
};
uart0_gpio36: uart0_gpio36 {
brcm,pins = <36 37>;