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authorKrzysztof Kozlowski <krzk@kernel.org>2019-04-15 21:05:09 +0300
committerKrzysztof Kozlowski <krzk@kernel.org>2019-04-24 20:53:23 +0300
commit1e440c223503c24959fcccb96c2b0e775a6b3bb9 (patch)
tree49dbaf9919e5cbaa4535252b37121d08a73f332b /arch/arm/boot/dts
parent39691e775a52c7f69cf164500bd541f7c88a468f (diff)
downloadlinux-1e440c223503c24959fcccb96c2b0e775a6b3bb9.tar.xz
ARM: dts: exynos: Move fixed-clocks out of soc on Exynos3250
The three fixed-clocks (xusbxti, xxti and xtcxo) are inputs to the Exynos3250 therefore they should not be inside the soc node. This also fixes DTC W=1 warning: arch/arm/boot/dts/exynos3250.dtsi:112.21-139.5: Warning (simple_bus_reg): /soc/fixed-rate-clocks: missing or empty reg/ranges property Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi58
1 files changed, 29 insertions, 29 deletions
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 6e74e6815b01..8ce3a7786b19 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -97,6 +97,35 @@
};
};
+ fixed-rate-clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ xusbxti: clock@0 {
+ compatible = "fixed-clock";
+ reg = <0>;
+ clock-frequency = <0>;
+ #clock-cells = <0>;
+ clock-output-names = "xusbxti";
+ };
+
+ xxti: clock@1 {
+ compatible = "fixed-clock";
+ reg = <1>;
+ clock-frequency = <0>;
+ #clock-cells = <0>;
+ clock-output-names = "xxti";
+ };
+
+ xtcxo: clock@2 {
+ compatible = "fixed-clock";
+ reg = <2>;
+ clock-frequency = <0>;
+ #clock-cells = <0>;
+ clock-output-names = "xtcxo";
+ };
+ };
+
pmu {
compatible = "arm,cortex-a7-pmu";
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -109,35 +138,6 @@
#size-cells = <1>;
ranges;
- fixed-rate-clocks {
- #address-cells = <1>;
- #size-cells = <0>;
-
- xusbxti: clock@0 {
- compatible = "fixed-clock";
- reg = <0>;
- clock-frequency = <0>;
- #clock-cells = <0>;
- clock-output-names = "xusbxti";
- };
-
- xxti: clock@1 {
- compatible = "fixed-clock";
- reg = <1>;
- clock-frequency = <0>;
- #clock-cells = <0>;
- clock-output-names = "xxti";
- };
-
- xtcxo: clock@2 {
- compatible = "fixed-clock";
- reg = <2>;
- clock-frequency = <0>;
- #clock-cells = <0>;
- clock-output-names = "xtcxo";
- };
- };
-
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x40000>;