diff options
| author | Soren Brinkmann <soren.brinkmann@xilinx.com> | 2014-05-05 21:16:08 +0400 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2014-05-06 15:03:43 +0400 |
| commit | f7b1e9b5bc87a379c9746091aae4de4ece4e7931 (patch) | |
| tree | 9c1d838f43d61358257eabc0cbddceff6270858c /arch/arm/boot/dts/zynq-7000.dtsi | |
| parent | f8e3e4d15c0d06d61a1866b389f1af34aa0e777d (diff) | |
| download | linux-f7b1e9b5bc87a379c9746091aae4de4ece4e7931.tar.xz | |
ARM: zynq: dt: Clean up device tree
- Use generic node names
- Fix up some weird formatting and white spaces
- Update copyright info
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Diffstat (limited to 'arch/arm/boot/dts/zynq-7000.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/zynq-7000.dtsi | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index 34dff3856e99..c494f9651499 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Xilinx + * Copyright (C) 2011 - 2014 Xilinx * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and @@ -55,7 +55,7 @@ interrupt-parent = <&intc>; ranges; - i2c0: zynq-i2c@e0004000 { + i2c0: i2c@e0004000 { compatible = "cdns,i2c-r1p10"; status = "disabled"; clocks = <&clkc 38>; @@ -66,7 +66,7 @@ #size-cells = <0>; }; - i2c1: zynq-i2c@e0005000 { + i2c1: i2c@e0005000 { compatible = "cdns,i2c-r1p10"; status = "disabled"; clocks = <&clkc 39>; @@ -94,7 +94,7 @@ cache-level = <2>; }; - uart0: uart@e0000000 { + uart0: serial@e0000000 { compatible = "xlnx,xuartps"; status = "disabled"; clocks = <&clkc 23>, <&clkc 40>; @@ -103,7 +103,7 @@ interrupts = <0 27 4>; }; - uart1: uart@e0001000 { + uart1: serial@e0001000 { compatible = "xlnx,xuartps"; status = "disabled"; clocks = <&clkc 24>, <&clkc 41>; @@ -130,7 +130,7 @@ clock-names = "pclk", "hclk", "tx_clk"; }; - sdhci0: ps7-sdhci@e0100000 { + sdhci0: sdhci@e0100000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; @@ -140,7 +140,7 @@ reg = <0xe0100000 0x1000>; } ; - sdhci1: ps7-sdhci@e0101000 { + sdhci1: sdhci@e0101000 { compatible = "arasan,sdhci-8.9a"; status = "disabled"; clock-names = "clk_xin", "clk_ahb"; @@ -184,26 +184,27 @@ clocks = <&clkc 4>; }; - ttc0: ttc0@f8001000 { + ttc0: timer@f8001000 { interrupt-parent = <&intc>; - interrupts = < 0 10 4 0 11 4 0 12 4 >; + interrupts = <0 10 4>, <0 11 4>, <0 12 4>; compatible = "cdns,ttc"; clocks = <&clkc 6>; reg = <0xF8001000 0x1000>; }; - ttc1: ttc1@f8002000 { + ttc1: timer@f8002000 { interrupt-parent = <&intc>; - interrupts = < 0 37 4 0 38 4 0 39 4 >; + interrupts = <0 37 4>, <0 38 4>, <0 39 4>; compatible = "cdns,ttc"; clocks = <&clkc 6>; reg = <0xF8002000 0x1000>; }; - scutimer: scutimer@f8f00600 { + + scutimer: timer@f8f00600 { interrupt-parent = <&intc>; - interrupts = < 1 13 0x301 >; + interrupts = <1 13 0x301>; compatible = "arm,cortex-a9-twd-timer"; - reg = < 0xf8f00600 0x20 >; + reg = <0xf8f00600 0x20>; clocks = <&clkc 4>; } ; }; |