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| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2020-01-16 15:50:44 +0300 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2020-01-17 18:56:09 +0300 |
| commit | 37f3e0096f716b06338a4771633b32b8e2a36f7f (patch) | |
| tree | 96e3a2aa19c51f1fcc400d167df8d8e39996f798 /arch/arm/boot/dts/uniphier-ld4.dtsi | |
| parent | 38dbf2de46acb4e0965ba7719d2a8ee1bc80181f (diff) | |
| download | linux-37f3e0096f716b06338a4771633b32b8e2a36f7f.tar.xz | |
ARM: dts: uniphier: add reset-names to NAND controller node
The Denali NAND controller IP has separate reset control for the
controller core and registers.
Add the reset-names, and one more phandle accordingly. This is the
approved DT-binding.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm/boot/dts/uniphier-ld4.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/uniphier-ld4.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/uniphier-ld4.dtsi b/arch/arm/boot/dts/uniphier-ld4.dtsi index 58cd4e8fa5be..64ec46c72a4c 100644 --- a/arch/arm/boot/dts/uniphier-ld4.dtsi +++ b/arch/arm/boot/dts/uniphier-ld4.dtsi @@ -410,7 +410,8 @@ pinctrl-0 = <&pinctrl_nand>; clock-names = "nand", "nand_x", "ecc"; clocks = <&sys_clk 2>, <&sys_clk 3>, <&sys_clk 3>; - resets = <&sys_rst 2>; + reset-names = "nand", "reg"; + resets = <&sys_rst 2>, <&sys_rst 2>; }; }; }; |