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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2018-08-31 19:38:06 +0300
committerThierry Reding <treding@nvidia.com>2018-09-26 17:45:48 +0300
commit7b0f47aa62085db10d54849092f58f317b49b84d (patch)
tree40fd4a284de4804782d0f9d3cc908e60713051b9 /arch/arm/boot/dts/tegra30-apalis.dtsi
parent200be313fdc9bb9810bba3450698c1bf923b814f (diff)
downloadlinux-7b0f47aa62085db10d54849092f58f317b49b84d.tar.xz
ARM: tegra: apalis_t30: get rid of fake clocks simple bus
Get rid of the fake clocks simple bus and use node names as per the actual schematics. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30-apalis.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra30-apalis.dtsi27
1 files changed, 9 insertions, 18 deletions
diff --git a/arch/arm/boot/dts/tegra30-apalis.dtsi b/arch/arm/boot/dts/tegra30-apalis.dtsi
index 6d6f17422478..d80101df2228 100644
--- a/arch/arm/boot/dts/tegra30-apalis.dtsi
+++ b/arch/arm/boot/dts/tegra30-apalis.dtsi
@@ -1097,25 +1097,16 @@
mmc-ddr-1_8v;
};
- clocks {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- clk32k_in: clk@0 {
- compatible = "fixed-clock";
- reg = <0>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
+ clk32k_in: xtal1 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
- clk16m: clk@1 {
- compatible = "fixed-clock";
- reg = <1>;
- #clock-cells = <0>;
- clock-frequency = <16000000>;
- clock-output-names = "clk16m";
- };
+ clk16m: osc4 {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <16000000>;
};
reg_1v8_avdd_hdmi_pll: regulator-1v8-avdd-hdmi-pll {