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| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-08-31 19:38:11 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2018-09-26 17:45:50 +0300 |
| commit | da25001ca651430f13c0f3bebec0e969b1b4de63 (patch) | |
| tree | 19618a0ced979771e81b9ddac296118cd97813e6 /arch/arm/boot/dts/tegra30-apalis-eval.dts | |
| parent | 317d9f7bedc4ee6b4d146e0a434cf3cb9f09b1ff (diff) | |
| download | linux-da25001ca651430f13c0f3bebec0e969b1b4de63.tar.xz | |
ARM: tegra: apalis_t30: hog group for pcie switch reset gpio
The Apalis Evaluation Board uses Apalis GPIO7 on MXM3 pin 15 as reset
signal for its PLX PEX 8605 PCIe Switch.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra30-apalis-eval.dts')
| -rw-r--r-- | arch/arm/boot/dts/tegra30-apalis-eval.dts | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index bbde98fd9712..9d9dda6c0246 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -240,3 +240,13 @@ vin-supply = <®_5v0>; }; }; + +&gpio { + /* Apalis GPIO7 MXM3 pin 15 PLX PEX 8605 PCIe Switch Reset */ + pex-perst-n { + gpio-hog; + gpios = <TEGRA_GPIO(S, 7) GPIO_ACTIVE_HIGH>; + output-high; + line-name = "PEX_PERST_N"; + }; +}; |