diff options
author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-09-02 13:08:44 +0300 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2018-09-26 17:55:12 +0300 |
commit | 992cf09b14e391748c46add889e4249603fa3a39 (patch) | |
tree | 36c21bc3bfe311641eb045ada143b5313476abed /arch/arm/boot/dts/tegra20-colibri.dtsi | |
parent | a2cb59be1086450c8dea7bfbbf2bf0e47c93ced1 (diff) | |
download | linux-992cf09b14e391748c46add889e4249603fa3a39.tar.xz |
ARM: tegra: colibri_t20: add missing pinmux
Explicitly add pinmux' for all T20 SoC ball groups now:
- Colibri Address/Data Bus (GMI) further pins used as GPIOs
- Colibri BL_ON
- Colibri EXT_IO*
- Colibri L_BIAS, LCD_M1 is muxed with LCD_DE today's display need DE,
disable LCD_M1
- more Colibri LCD pins (L_* resp. LDD<*>)
- Colibri LCD (Optional 24 BPP Support)
- Colibri MMCCD
- uart_a_dsr and uart_a_dcd as GPIOs
- Colibri USB_CDET
- I2C3 (Optional)
- JTAG_RTCK
- LAN_RESET, LAN_EXT_WAKEUP and LAN_PME (All On-module)
- more NAND pins
- RESET_OUT
- THERMD_ALERT# (On-module), unlatched I2C address pin of LM95245
temperature sensor therefore requires disabling for now
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-colibri.dtsi')
-rw-r--r-- | arch/arm/boot/dts/tegra20-colibri.dtsi | 134 |
1 files changed, 119 insertions, 15 deletions
diff --git a/arch/arm/boot/dts/tegra20-colibri.dtsi b/arch/arm/boot/dts/tegra20-colibri.dtsi index dfe237cea14b..aa2ca3dad32c 100644 --- a/arch/arm/boot/dts/tegra20-colibri.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri.dtsi @@ -75,20 +75,36 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; }; - /* Colibri Address/Data Bus (GMI) */ - gpio-gmi { - nvidia,pins = "ata", "atc", "atd", "ate", - "dap1", "dap2", "dap4", "gpu", "irrx", - "irtx", "spia", "spib", "spic"; + /* + * Colibri Address/Data Bus (GMI) + * Note: spid and spie optionally used for SPI1 + */ + gmi { + nvidia,pins = "atc", "atd", "ate", "dap1", + "dap2", "dap4", "gmd", "gpu", + "irrx", "irtx", "spia", "spib", + "spic", "spid", "spie", "uca", + "ucb"; nvidia,function = "gmi"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; - nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + /* Further pins may be used as GPIOs */ + gmi-gpio1 { + nvidia,pins = "lpw0", "lsc1", "lsck", "lsda"; + nvidia,function = "hdmi"; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + gmi-gpio2 { + nvidia,pins = "lcsn", "ldc", "lm0", "lsdi"; + nvidia,function = "rsvd4"; + nvidia,tristate = <TEGRA_PIN_ENABLE>; }; /* Colibri BL_ON */ bl-on { nvidia,pins = "dta"; - nvidia,function = "vi"; + nvidia,function = "rsvd1"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_ENABLE>; }; @@ -113,8 +129,8 @@ * Note: dtf optionally used for I2C3 */ ext-io { - nvidia,pins = "dtf"; - nvidia,function = "i2c3"; + nvidia,pins = "dtf", "spdi"; + nvidia,function = "rsvd2"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_ENABLE>; }; @@ -151,15 +167,31 @@ nvidia,tristate = <TEGRA_PIN_ENABLE>; }; + /* + * Colibri L_BIAS, LCD_M1 is muxed with LCD_DE + * today's display need DE, disable LCD_M1 + */ + lm1 { + nvidia,pins = "lm1"; + nvidia,function = "rsvd3"; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + /* Colibri LCD (L_* resp. LDD<*>) */ lcd { nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4", "ld5", "ld6", "ld7", "ld8", "ld9", "ld10", "ld11", "ld12", "ld13", "ld14", "ld15", - "ld16", "ld17", "lhs", "lpw0", - "lpw2", "lsc0", "lsc1", "lsck", - "lsda", "lspi", "lvs"; + "ld16", "ld17", "lhs", "lsc0", + "lspi", "lvs"; + nvidia,function = "displaya"; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + /* Colibri LCD (Optional 24 BPP Support) */ + lcd-24 { + nvidia,pins = "ldi", "lhp0", "lhp1", "lhp2", + "lpp", "lvp1"; nvidia,function = "displaya"; nvidia,tristate = <TEGRA_PIN_ENABLE>; }; @@ -172,6 +204,14 @@ nvidia,tristate = <TEGRA_PIN_ENABLE>; }; + /* Colibri MMCCD */ + mmccd { + nvidia,pins = "gmb"; + nvidia,function = "gmi_int"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + /* Colibri MMC (Optional 8-bit) */ mmc-8bit { nvidia,pins = "gme"; @@ -220,6 +260,16 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_ENABLE>; }; + uart-a-dsr { + nvidia,pins = "lpw1"; + nvidia,function = "rsvd3"; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + uart-a-dcd { + nvidia,pins = "lpw2"; + nvidia,function = "hdmi"; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; /* Colibri UART-B */ uart-b { @@ -237,12 +287,20 @@ nvidia,tristate = <TEGRA_PIN_ENABLE>; }; + /* Colibri USB_CDET */ + usb-cdet { + nvidia,pins = "spdo"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + /* Colibri USBH_OC */ usbh-oc { nvidia,pins = "spih"; nvidia,function = "spi2_alt"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; - nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; }; /* Colibri USBH_PEN */ @@ -250,7 +308,7 @@ nvidia,pins = "spig"; nvidia,function = "spi2_alt"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; - nvidia,tristate = <TEGRA_PIN_DISABLE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; }; /* Colibri VGA not supported */ @@ -261,6 +319,33 @@ nvidia,tristate = <TEGRA_PIN_ENABLE>; }; + /* I2C3 (Optional) */ + i2c3 { + nvidia,pins = "dtf"; + nvidia,function = "i2c3"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + + /* JTAG_RTCK */ + jtag-rtck { + nvidia,pins = "gpu7"; + nvidia,function = "rtck"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; + + /* + * LAN_RESET, LAN_EXT_WAKEUP and LAN_PME + * (All On-module) + */ + gpio-gpv { + nvidia,pins = "gpv"; + nvidia,function = "rsvd2"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + /* * LAN_V_BUS, VDD_FAULT, BATT_FAULT, WM9712 PENDOWN * (All On-module); Colibri CAN_INT @@ -274,7 +359,7 @@ /* NAND (On-module) */ nand { - nvidia,pins = "kbca", "kbcc", "kbcd", + nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd", "kbce", "kbcf"; nvidia,function = "nand"; nvidia,pull = <TEGRA_PIN_PULL_NONE>; @@ -297,6 +382,14 @@ nvidia,tristate = <TEGRA_PIN_DISABLE>; }; + /* RESET_OUT */ + reset-out { + nvidia,pins = "ata"; + nvidia,function = "gmi"; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + /* * SPI1 (Optional) * Note: spid and spie used for Colibri Address/Data @@ -308,6 +401,17 @@ nvidia,pull = <TEGRA_PIN_PULL_NONE>; nvidia,tristate = <TEGRA_PIN_ENABLE>; }; + + /* + * THERMD_ALERT# (On-module), unlatched I2C address pin + * of LM95245 temperature sensor therefore requires + * disabling for now + */ + lvp0 { + nvidia,pins = "lvp0"; + nvidia,function = "rsvd3"; + nvidia,tristate = <TEGRA_PIN_ENABLE>; + }; }; }; |