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authorMaxime Ripard <maxime.ripard@bootlin.com>2019-03-25 16:52:52 +0300
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-03-25 23:05:42 +0300
commita4dc791974e568a15f7f37131729b1a6912f4811 (patch)
tree219b2e68a006a64318eeb616b6eccf4d337825c6 /arch/arm/boot/dts/sunxi-h3-h5.dtsi
parent75f9a058838be9880afd75c4cb14e1bf4fe34a0b (diff)
downloadlinux-a4dc791974e568a15f7f37131729b1a6912f4811.tar.xz
ARM: dts: sun8i: h3: Refactor the pinctrl node names
The H3 and H5 have never been converted to the new convention we want to have for the pinctrl nodes. Convert them. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi')
-rw-r--r--arch/arm/boot/dts/sunxi-h3-h5.dtsi38
1 files changed, 19 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
index 395521e83ee7..8a79d3b04069 100644
--- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
+++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi
@@ -386,14 +386,14 @@
interrupt-controller;
#interrupt-cells = <3>;
- csi_pins: csi {
+ csi_pins: csi-pins {
pins = "PE0", "PE2", "PE3", "PE4", "PE5",
"PE6", "PE7", "PE8", "PE9", "PE10",
"PE11";
function = "csi";
};
- emac_rgmii_pins: emac0 {
+ emac_rgmii_pins: emac-rgmii-pins {
pins = "PD0", "PD1", "PD2", "PD3", "PD4",
"PD5", "PD7", "PD8", "PD9", "PD10",
"PD12", "PD13", "PD15", "PD16", "PD17";
@@ -401,22 +401,22 @@
drive-strength = <40>;
};
- i2c0_pins: i2c0 {
+ i2c0_pins: i2c0-pins {
pins = "PA11", "PA12";
function = "i2c0";
};
- i2c1_pins: i2c1 {
+ i2c1_pins: i2c1-pins {
pins = "PA18", "PA19";
function = "i2c1";
};
- i2c2_pins: i2c2 {
+ i2c2_pins: i2c2-pins {
pins = "PE12", "PE13";
function = "i2c2";
};
- mmc0_pins: mmc0 {
+ mmc0_pins: mmc0-pins {
pins = "PF0", "PF1", "PF2", "PF3",
"PF4", "PF5";
function = "mmc0";
@@ -424,7 +424,7 @@
bias-pull-up;
};
- mmc1_pins: mmc1 {
+ mmc1_pins: mmc1-pins {
pins = "PG0", "PG1", "PG2", "PG3",
"PG4", "PG5";
function = "mmc1";
@@ -432,7 +432,7 @@
bias-pull-up;
};
- mmc2_8bit_pins: mmc2_8bit {
+ mmc2_8bit_pins: mmc2-8bit-pins {
pins = "PC5", "PC6", "PC8",
"PC9", "PC10", "PC11",
"PC12", "PC13", "PC14",
@@ -442,47 +442,47 @@
bias-pull-up;
};
- spdif_tx_pins_a: spdif {
+ spdif_tx_pin: spdif-tx-pin {
pins = "PA17";
function = "spdif";
};
- spi0_pins: spi0 {
+ spi0_pins: spi0-pins {
pins = "PC0", "PC1", "PC2", "PC3";
function = "spi0";
};
- spi1_pins: spi1 {
+ spi1_pins: spi1-pins {
pins = "PA15", "PA16", "PA14", "PA13";
function = "spi1";
};
- uart0_pins_a: uart0 {
+ uart0_pa_pins: uart0-pa-pins {
pins = "PA4", "PA5";
function = "uart0";
};
- uart1_pins: uart1 {
+ uart1_pins: uart1-pins {
pins = "PG6", "PG7";
function = "uart1";
};
- uart1_rts_cts_pins: uart1_rts_cts {
+ uart1_rts_cts_pins: uart1-rts-cts-pins {
pins = "PG8", "PG9";
function = "uart1";
};
- uart2_pins: uart2 {
+ uart2_pins: uart2-pins {
pins = "PA0", "PA1";
function = "uart2";
};
- uart3_pins: uart3 {
+ uart3_pins: uart3-pins {
pins = "PA13", "PA14";
function = "uart3";
};
- uart3_rts_cts_pins: uart3_rts_cts {
+ uart3_rts_cts_pins: uart3-rts-cts-pins {
pins = "PA15", "PA16";
function = "uart3";
};
@@ -860,12 +860,12 @@
interrupt-controller;
#interrupt-cells = <3>;
- ir_pins_a: ir {
+ r_ir_rx_pin: r-ir-rx-pin {
pins = "PL11";
function = "s_cir_rx";
};
- r_i2c_pins: r-i2c {
+ r_i2c_pins: r-i2c-pins {
pins = "PL0", "PL1";
function = "s_i2c";
};