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| author | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-07 12:58:01 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-28 17:14:20 +0300 |
| commit | 090e563c91e6cea86e79659868ad70ef313a884a (patch) | |
| tree | 32188fef01e782157d3dcfe53ee5190327b90ec2 /arch/arm/boot/dts/sun8i-a33.dtsi | |
| parent | 4ead0ad7b21734c03d91659ca60818114fffcf7c (diff) | |
| download | linux-090e563c91e6cea86e79659868ad70ef313a884a.tar.xz | |
ARM: dts: sun8i: a23/a33: Change pinctrl nodes to avoid warning
All our pinctrl nodes were using a node name convention with a unit-address
to differentiate the different muxing options. However, since those nodes
didn't have a reg property, they were generating warnings in DTC.
In order to accomodate for this, convert the old nodes to the syntax we've
been using for the new SoCs, including removing the letter suffix of the
node labels to the bank of those pins to make things more readable.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun8i-a33.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun8i-a33.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi index 72cd1a2431bc..c2c10cd4a210 100644 --- a/arch/arm/boot/dts/sun8i-a33.dtsi +++ b/arch/arm/boot/dts/sun8i-a33.dtsi @@ -552,7 +552,7 @@ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; - uart0_pins_b: uart0@1 { + uart0_pb_pins: uart0-pb-pins { pins = "PB0", "PB1"; function = "uart0"; }; |