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author | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-07 12:58:01 +0300 |
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committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-11-28 17:14:13 +0300 |
commit | 85a8c520ca41c719d552595d0aac456ac84b8a33 (patch) | |
tree | 3699541220c3a51154cf5eeb537cddeec7605e70 /arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | |
parent | c8fd1584f4df4028e278a95796da0b225b2720cd (diff) | |
download | linux-85a8c520ca41c719d552595d0aac456ac84b8a33.tar.xz |
ARM: dts: sun7i: Change pinctrl nodes to avoid warning
All our pinctrl nodes were using a node name convention with a unit-address
to differentiate the different muxing options. However, since those nodes
didn't have a reg property, they were generating warnings in DTC.
In order to accomodate for this, convert the old nodes to the syntax we've
been using for the new SoCs, including removing the letter suffix of the
node labels to the bank of those pins to make things more readable.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts')
-rw-r--r-- | arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts index ed6f4e1e94b3..9ea84cf6437b 100644 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-lime2.dts @@ -110,7 +110,7 @@ &gmac { pinctrl-names = "default"; - pinctrl-0 = <&gmac_pins_rgmii_a>; + pinctrl-0 = <&gmac_rgmii_pins>; phy = <&phy1>; phy-mode = "rgmii"; status = "okay"; @@ -132,7 +132,7 @@ &i2c0 { pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins_a>; + pinctrl-0 = <&i2c0_pins>; status = "okay"; axp209: pmic@34 { @@ -144,7 +144,7 @@ &i2c1 { pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins_a>; + pinctrl-0 = <&i2c1_pins>; status = "okay"; eeprom: eeprom@50 { @@ -160,7 +160,7 @@ &mmc0 { pinctrl-names = "default"; - pinctrl-0 = <&mmc0_pins_a>; + pinctrl-0 = <&mmc0_pins>; vmmc-supply = <®_vcc3v3>; bus-width = <4>; cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>; /* PH1 */ @@ -261,7 +261,7 @@ &uart0 { pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins_a>; + pinctrl-0 = <&uart0_pb_pins>; status = "okay"; }; |