summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
diff options
context:
space:
mode:
authorMaxime Ripard <maxime.ripard@bootlin.com>2018-11-07 12:58:01 +0300
committerMaxime Ripard <maxime.ripard@bootlin.com>2018-11-28 17:14:13 +0300
commit85a8c520ca41c719d552595d0aac456ac84b8a33 (patch)
tree3699541220c3a51154cf5eeb537cddeec7605e70 /arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
parentc8fd1584f4df4028e278a95796da0b225b2720cd (diff)
downloadlinux-85a8c520ca41c719d552595d0aac456ac84b8a33.tar.xz
ARM: dts: sun7i: Change pinctrl nodes to avoid warning
All our pinctrl nodes were using a node name convention with a unit-address to differentiate the different muxing options. However, since those nodes didn't have a reg property, they were generating warnings in DTC. In order to accomodate for this, convert the old nodes to the syntax we've been using for the new SoCs, including removing the letter suffix of the node labels to the bank of those pins to make things more readable. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org>
Diffstat (limited to 'arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts')
-rw-r--r--arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts22
1 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
index cccfee6add35..32e204fe8c15 100644
--- a/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
+++ b/arch/arm/boot/dts/sun7i-a20-lamobo-r1.dts
@@ -119,7 +119,7 @@
&gmac {
pinctrl-names = "default";
- pinctrl-0 = <&gmac_pins_rgmii_a>;
+ pinctrl-0 = <&gmac_rgmii_pins>;
phy-mode = "rgmii";
phy-supply = <&reg_gmac_3v3>;
status = "okay";
@@ -196,7 +196,7 @@
&i2c0 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c0_pins_a>;
+ pinctrl-0 = <&i2c0_pins>;
status = "okay";
axp209: pmic@34 {
@@ -208,19 +208,19 @@
&i2c2 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins_a>;
+ pinctrl-0 = <&i2c2_pins>;
status = "okay";
};
&ir0 {
pinctrl-names = "default";
- pinctrl-0 = <&ir0_rx_pins_a>;
+ pinctrl-0 = <&ir0_rx_pin>;
status = "okay";
};
&mmc0 {
pinctrl-names = "default";
- pinctrl-0 = <&mmc0_pins_a>;
+ pinctrl-0 = <&mmc0_pins>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 7 10 GPIO_ACTIVE_LOW>; /* PH10 */
@@ -294,27 +294,27 @@
&spi0 {
pinctrl-names = "default";
- pinctrl-0 = <&spi0_pins_a>,
- <&spi0_cs0_pins_a>,
- <&spi0_cs1_pins_a>;
+ pinctrl-0 = <&spi0_pi_pins>,
+ <&spi0_cs0_pi_pin>,
+ <&spi0_cs1_pi_pin>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins_a>;
+ pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
- pinctrl-0 = <&uart3_pins_b>;
+ pinctrl-0 = <&uart3_ph_pins>;
status = "okay";
};
&uart7 {
pinctrl-names = "default";
- pinctrl-0 = <&uart7_pins_a>;
+ pinctrl-0 = <&uart7_pi_pins>;
status = "okay";
};