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| author | Patrice Chotard <patrice.chotard@st.com> | 2018-01-18 19:34:59 +0300 |
|---|---|---|
| committer | Patrice Chotard <patrice.chotard@st.com> | 2018-02-12 17:24:35 +0300 |
| commit | b2d81762ce896e488e79abe292b8700b8ba1a303 (patch) | |
| tree | 8cbf82d0a180efb036126c9c1933fc678a7e3fc5 /arch/arm/boot/dts/stih407-family.dtsi | |
| parent | 0b09a91a0d053c78429a0f0ffd169d7afcba70a7 (diff) | |
| download | linux-b2d81762ce896e488e79abe292b8700b8ba1a303.tar.xz | |
ARM: dts: STi: Add fake reg property for miphy28lp_phy
Add fake reg property to miphy28lp_phy.
This allows to fix the following warning when compiling
dtb with W=1 option:
arch/arm/boot/dts/stih407-b2120.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2120.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property
arch/arm/boot/dts/stih410-b2260.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property
arch/arm/boot/dts/stih418-b2199.dtb: Warning (simple_bus_reg):
Node /soc/miphy28lp missing or empty reg/ranges property
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stih407-family.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/stih407-family.dtsi | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index 1608c70f05a9..e279cd07ba67 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -389,12 +389,13 @@ reset-names = "global", "port"; }; - miphy28lp_phy: miphy28lp { + miphy28lp_phy: miphy28lp@0 { compatible = "st,miphy28lp-phy"; st,syscfg = <&syscfg_core>; #address-cells = <1>; #size-cells = <1>; ranges; + reg = <0 0>; phy_port0: port@9b22000 { reg = <0x9b22000 0xff>, |