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| author | Matthias Kaehlcke <mka@chromium.org> | 2019-05-21 01:00:49 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2019-05-22 12:03:29 +0300 |
| commit | 75481833c6dbab4c29d15452f6b4337c16f5407b (patch) | |
| tree | e1db13bfb170720963d87d3b6858a9897c3faf93 /arch/arm/boot/dts/rk3288.dtsi | |
| parent | ae2b6ba865d8bb59493aaf50cb3d19312a6ff5a4 (diff) | |
| download | linux-75481833c6dbab4c29d15452f6b4337c16f5407b.tar.xz | |
ARM: dts: rockchip: remove GPU 500 MHz OPP on rk3288
The NPLL is the only safe way to generate 500 MHz for the GPU. The
downstream Chrome OS 3.14 kernel ('official' kernel for veyron
devices) re-purposes NPLL to HDMI and hence disables the OPP for
the GPU (see https://crrev.com/c/1574579). Disable it here as well
to keep in sync and avoid problems in case someone decides to
re-purpose NPLL.
Signed-off-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
[moved from veyron to general rk3288, as tying up the NPLL for a
not-that-helpful opp (not really fast but will still generate
quite a bit of heat) doesn't make so much sense when it will
keep us from supporting other display modes in the future]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/rk3288.dtsi | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index fd188bb4fd48..159d91180cee 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -1307,10 +1307,6 @@ opp-hz = /bits/ 64 <400000000>; opp-microvolt = <1100000>; }; - opp-500000000 { - opp-hz = /bits/ 64 <500000000>; - opp-microvolt = <1200000>; - }; opp-600000000 { opp-hz = /bits/ 64 <600000000>; opp-microvolt = <1250000>; |