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authorAbhishek Pandit-Subedi <abhishekpandit@chromium.org>2019-11-28 01:39:09 +0300
committerHeiko Stuebner <heiko@sntech.de>2019-12-11 01:31:48 +0300
commit8784692d2800c91330c8f8b6158204dedee97d6d (patch)
tree742a3e4a92ad1533dda92dce7646fd952523e9a1 /arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
parente42617b825f8073569da76dc4510bfa019b1c35a (diff)
downloadlinux-8784692d2800c91330c8f8b6158204dedee97d6d.tar.xz
ARM: dts: rockchip: Add brcm bluetooth for rk3288-veyron
This enables the Broadcom uart bluetooth driver on uart0 and gives it ownership of its gpios. In order to use this, you must enable the following kconfig options: - CONFIG_BT_HCIUART_BCM - CONFIG_SERIAL_DEV This is applicable to rk3288-veyron series boards that use the bcm43540 wifi+bt chips. As part of this change, also refactor the pinctrl across the various boards. All the boards using broadcom bluetooth shouldn't touch the bt_dev_wake pin. Signed-off-by: Abhishek Pandit-Subedi <abhishekpandit@chromium.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Link: https://lore.kernel.org/r/20191127223909.253873-2-abhishekpandit@chromium.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi')
-rw-r--r--arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi21
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
index ffb60f880b39..05112c25176d 100644
--- a/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
+++ b/arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi
@@ -136,27 +136,6 @@
};
&pinctrl {
- pinctrl-0 = <
- /* Common for sleep and wake, but no owners */
- &ddr0_retention
- &ddrio_pwroff
- &global_pwroff
-
- /* Wake only */
- &suspend_l_wake
- &bt_dev_wake_awake
- >;
- pinctrl-1 = <
- /* Common for sleep and wake, but no owners */
- &ddr0_retention
- &ddrio_pwroff
- &global_pwroff
-
- /* Sleep only */
- &suspend_l_sleep
- &bt_dev_wake_sleep
- >;
-
buttons {
ap_lid_int_l: ap-lid-int-l {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>;