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authorYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>2014-10-24 14:44:34 +0400
committerSimon Horman <horms+renesas@verge.net.au>2014-10-30 03:56:33 +0300
commite03074a7b5fdd2834a9fbbe77bc52a1ddb0d017f (patch)
tree35ad17c952f3321850896a9cc1ee81043cf97239 /arch/arm/boot/dts/r8a7790-lager.dts
parentae0a555b68ae4feef07e919b22ef2e0b792616ee (diff)
downloadlinux-e03074a7b5fdd2834a9fbbe77bc52a1ddb0d017f.tar.xz
ARM: shmobile: lager: enable HS-USB
Enable HS-USB device for the Lager board, defining the GPIO that the driver should check when probing. Since this board doesn't have the OTG ID pin, we assume that GP5_18 (USB0_PWEN) is an ID pin because it is 1 when the SW5 is in position 2-3 (meaning USB function) and 0 in other positions. Note that there will be pinctrl-related error messages if both internal PCI and HS-USB drivers are enabled but they should be just ignored. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> [Sergei: added pin node and prop, moved device node, fixed summary, supplemented changelog] Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/r8a7790-lager.dts')
-rw-r--r--arch/arm/boot/dts/r8a7790-lager.dts12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index d869f2a6826a..830f2e87df49 100644
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -268,6 +268,11 @@
renesas,function = "iic3";
};
+ hsusb_pins: hsusb {
+ renesas,groups = "usb0_ovc_vbus";
+ renesas,function = "usb0";
+ };
+
usb0_pins: usb0 {
renesas,groups = "usb0";
renesas,function = "usb0";
@@ -478,6 +483,13 @@
pinctrl-names = "default";
};
+&hsusb {
+ status = "okay";
+ pinctrl-0 = <&hsusb_pins>;
+ pinctrl-names = "default";
+ renesas,enable-gpio = <&gpio5 18 GPIO_ACTIVE_HIGH>;
+};
+
&usbphy {
status = "okay";
};