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author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-05-09 19:54:39 +0300 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-05-09 19:54:39 +0300 |
commit | 85d604902eb28eaea4f9e0f3a655ae986fa4bd2e (patch) | |
tree | 3ca4ff0c7e13c09ad006f378fac066790586f391 /arch/arm/boot/dts/r7s72100.dtsi | |
parent | 8d648aad05811ccc07df22834de60a7bf8d9e0e6 (diff) | |
parent | b9f34da74e1c4b5f2574333277cd8d8f53bad056 (diff) | |
download | linux-85d604902eb28eaea4f9e0f3a655ae986fa4bd2e.tar.xz |
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Device-tree updates from Olof Johansson:
"Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
Major new platforms:
- Gemini has been ported to DT, so a handful of "new" platforms moved
over from board files
- Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288
SoM and RDK
- A bunch of embedded platforms, several Linksys platforms, Synology
DS116,
- Motorola Droid4 (really old OMAP-based phone) support is added.
Some refactorings, i.e. Allwinner H3/H5 support is commonalized.
And lots of smaller changes, cleanups, etc. See shortlog for more
description
We're adding ability to cross-include DT files between arm and arm64,
by creating appropriate links in the dt-include directory, and using
arm/ and arm64/ as include prefixes. This will avoid other local hacks
such as per-file links between the two arch trees (this broke for
external mirroring of DT contents). Now they can just provide their
own appropriate dt-include hierarcy per platform"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (349 commits)
ARM: dts: exynos: Use - instead of @ for DT OPP entries
arm: spear6xx: add DT description of the ADC on SPEAr600
arm: spear6xx: remove unneeded pinctrl properties in spear600-evb
arm: spear6xx: switch spear600-evb to the new flash partition DT binding
arm: spear6xx: fix spaces in spear600-evb.dts
arm: spear6xx: use node labels in spear600-evb.dts
arm: spear6xx: add labels to various nodes in spear600.dtsi
ARM: dts: vexpress: fix few unit address format warnings
ARM: dts: at91: sama5d3_xplained: not all ADC channels are available
ARM: dts: at91: sama5d3_xplained: fix ADC vref
ARM: dts: at91: add envelope detector mux to the Axentia TSE-850
ARM: dts: armada-38x: label USB and SATA nodes
ARM: dts: imx6q-utilite-pro: add hpd gpio
ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply
ARM: dts: imx6qdl-sabresd: Set LDO regulator supply
ARM: dts: imx: add Gateworks Ventana GW5903 support
ARM: dts: i.MX25: add AIPS control registers
ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators
ARM: dts: imx7-colibri: remove 1.8V fixed regulator
ARM: dts: imx7-colibri: allow to disable Ethernet rail
...
Diffstat (limited to 'arch/arm/boot/dts/r7s72100.dtsi')
-rw-r--r-- | arch/arm/boot/dts/r7s72100.dtsi | 65 |
1 files changed, 59 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index 1cf2bd038090..0423996e4dcc 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -51,6 +51,20 @@ clock-frequency = <0>; }; + rtc_x1_clk: rtc_x1 { + #clock-cells = <0>; + compatible = "fixed-clock"; + /* If clk present, value must be set by board to 32678 */ + clock-frequency = <0>; + }; + + rtc_x3_clk: rtc_x3 { + #clock-cells = <0>; + compatible = "fixed-clock"; + /* If clk present, value must be set by board to 4000000 */ + clock-frequency = <0>; + }; + /* Fixed factor clocks */ b_clk: b { #clock-cells = <0>; @@ -117,11 +131,20 @@ clock-output-names = "ostm0", "ostm1"; }; + mstp6_clks: mstp6_clks@fcfe042c { + #clock-cells = <1>; + compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; + reg = <0xfcfe042c 4>; + clocks = <&p0_clk>; + clock-indices = <R7S72100_CLK_RTC>; + clock-output-names = "rtc"; + }; + mstp7_clks: mstp7_clks@fcfe0430 { #clock-cells = <1>; compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0xfcfe0430 4>; - clocks = <&p0_clk>; + clocks = <&b_clk>; clock-indices = <R7S72100_CLK_ETHER>; clock-output-names = "ether"; }; @@ -162,9 +185,12 @@ #clock-cells = <1>; compatible = "renesas,r7s72100-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0xfcfe0444 4>; - clocks = <&p1_clk>, <&p1_clk>; - clock-indices = <R7S72100_CLK_SDHI1 R7S72100_CLK_SDHI0>; - clock-output-names = "sdhi1", "sdhi0"; + clocks = <&p1_clk>, <&p1_clk>, <&p1_clk>, <&p1_clk>; + clock-indices = < + R7S72100_CLK_SDHI00 R7S72100_CLK_SDHI01 + R7S72100_CLK_SDHI10 R7S72100_CLK_SDHI11 + >; + clock-output-names = "sdhi00", "sdhi01", "sdhi10", "sdhi11"; }; }; @@ -379,6 +405,13 @@ cache-level = <2>; }; + wdt: watchdog@fcfe0000 { + compatible = "renesas,r7s72100-wdt", "renesas,rza-wdt"; + reg = <0xfcfe0000 0x6>; + interrupts = <GIC_SPI 106 IRQ_TYPE_EDGE_RISING>; + clocks = <&p0_clk>; + }; + i2c0: i2c@fcfee000 { #address-cells = <1>; #size-cells = <0>; @@ -499,7 +532,10 @@ GIC_SPI 271 IRQ_TYPE_LEVEL_HIGH GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp12_clks R7S72100_CLK_SDHI0>; + clocks = <&mstp12_clks R7S72100_CLK_SDHI00>, + <&mstp12_clks R7S72100_CLK_SDHI01>; + clock-names = "core", "cd"; + power-domains = <&cpg_clocks>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -512,7 +548,10 @@ GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH GIC_SPI 275 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&mstp12_clks R7S72100_CLK_SDHI1>; + clocks = <&mstp12_clks R7S72100_CLK_SDHI10>, + <&mstp12_clks R7S72100_CLK_SDHI11>; + clock-names = "core", "cd"; + power-domains = <&cpg_clocks>; cap-sd-highspeed; cap-sdio-irq; status = "disabled"; @@ -535,4 +574,18 @@ power-domains = <&cpg_clocks>; status = "disabled"; }; + + rtc: rtc@fcff1000 { + compatible = "renesas,r7s72100-rtc", "renesas,sh-rtc"; + reg = <0xfcff1000 0x2e>; + interrupts = <GIC_SPI 276 IRQ_TYPE_EDGE_RISING + GIC_SPI 277 IRQ_TYPE_EDGE_RISING + GIC_SPI 278 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "alarm", "period", "carry"; + clocks = <&mstp6_clks R7S72100_CLK_RTC>, <&rtc_x1_clk>, + <&rtc_x3_clk>, <&extal_clk>; + clock-names = "fck", "rtc_x1", "rtc_x3", "extal"; + power-domains = <&cpg_clocks>; + status = "disabled"; + }; }; |