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authorCristian Ciocaltea <cristian.ciocaltea@gmail.com>2020-12-30 00:17:27 +0300
committerManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2020-12-31 10:35:33 +0300
commit7b69552264aca925e8550324027e4f10f8bf8c4f (patch)
tree66758fbaf7eee5ac291719c66f4018827ea47031 /arch/arm/boot/dts/owl-s500-roseapplepi.dts
parent8e23902d12433bf19be7e261eb02d64c27384901 (diff)
downloadlinux-7b69552264aca925e8550324027e4f10f8bf8c4f.tar.xz
arm: dts: owl-s500-roseapplepi: Add I2C pinctrl configuration
Add pinctrl definitions for the I2C controllers used in RoseapplePi SBC. For the moment enable only I2C0, which is used by the ATC2603C PMIC. Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/owl-s500-roseapplepi.dts')
-rw-r--r--arch/arm/boot/dts/owl-s500-roseapplepi.dts44
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/owl-s500-roseapplepi.dts b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
index fe9ae3619422..ff91561ca99c 100644
--- a/arch/arm/boot/dts/owl-s500-roseapplepi.dts
+++ b/arch/arm/boot/dts/owl-s500-roseapplepi.dts
@@ -37,7 +37,51 @@
};
};
+&i2c0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+};
+
+&i2c1 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c1_pins>;
+};
+
+&i2c2 {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+};
+
&pinctrl {
+ i2c0_pins: i2c0-pins {
+ pinmux {
+ groups = "i2c0_mfp";
+ function = "i2c0";
+ };
+
+ pinconf {
+ pins = "i2c0_sclk", "i2c0_sdata";
+ bias-pull-up;
+ };
+ };
+
+ i2c1_pins: i2c1-pins {
+ pinconf {
+ pins = "i2c1_sclk", "i2c1_sdata";
+ bias-pull-up;
+ };
+ };
+
+ i2c2_pins: i2c2-pins {
+ pinconf {
+ pins = "i2c2_sclk", "i2c2_sdata";
+ bias-pull-up;
+ };
+ };
+
mmc0_pins: mmc0-pins {
pinmux {
groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp",