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| author | Roger Quadros <rogerq@ti.com> | 2016-02-23 19:37:25 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2016-02-26 21:32:14 +0300 |
| commit | 44e4716499b8988a20ba99ba5c871cdbf1c819fd (patch) | |
| tree | d1c4994201c69bbfa7d8d4443e2533d9dfd059c3 /arch/arm/boot/dts/omap3-overo-base.dtsi | |
| parent | 6607fac8f45a33a2b66c64c90d7c37d39d6f0d69 (diff) | |
| download | linux-44e4716499b8988a20ba99ba5c871cdbf1c819fd.tar.xz | |
ARM: dts: omap3: Fix NAND device nodes
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.
The GPMC node will provide an interrupt controller for the
NAND IRQs.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3-overo-base.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap3-overo-base.dtsi | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/omap3-overo-base.dtsi b/arch/arm/boot/dts/omap3-overo-base.dtsi index a29ad16cc9bb..de256fa8da48 100644 --- a/arch/arm/boot/dts/omap3-overo-base.dtsi +++ b/arch/arm/boot/dts/omap3-overo-base.dtsi @@ -226,8 +226,12 @@ ranges = <0 0 0x00000000 0x20000000>; nand@0,0 { + compatible = "ti,omap2-nand"; linux,mtd-name= "micron,mt29c4g96maz"; - reg = <0 0 0>; + reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ + interrupt-parent = <&gpmc>; + interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ + <1 IRQ_TYPE_NONE>; /* termcount */ nand-bus-width = <16>; gpmc,device-width = <2>; ti,nand-ecc-opt = "bch8"; |