Merge tag 'omap-for-v3.19/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt

Pull "Device tree related changes for omaps" from Tony Lindgren:

- Fix currently harmless but wrong sizes for various GPMC connected
  devices

- Set up timings for several GPMC connected devices to get rid of
  bootloader dependencies in later patches

- Enable various drivers for dra7xx

- Prepare Igep boards to support new variants

- Add intial support for BeagleBoard-X15

* tag 'omap-for-v3.19/dt-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (37 commits)
  ARM: dts: DRA7: Add aliases for all serial ports
  ARM: dts: Add am57xx-beagle-x15
  ARM: OMAP2+: igep00x0: Add pdata-quirks for the btwilink device.
  ARM: dts: omap3-igep00x0: Remove i2c2 node.
  ARM: dts: omap3-igep0020-rev-f: Support IGEPv2 Rev. F
  ARM: dts: omap3-igep0020-common: Introduce igep0020 common dtsi file.
  ARM: dts: omap3-igep0030-rev-g: Support IGEP COM MODULE Rev. G
  ARM: dts: omap3-igep0030-common: Introduce igep0030 common dtsi file.
  ARM: dts: omap3-igep00x0: Move outside common file the on board Wifi module.
  ARM: dts: omap3-igep0020: Specify IGEPv2 revision in device tree.
  ARM: dts: omap3-igep0030: Specify IGEP COM revision in device tree.
  ARM: dts: omap3-igep00x0: Move NAND configuration to a common place.
  ARM: dts: omap3-igep00x0: Fix UART2 pins that aren't common.
  ARM: dts: dra7: add labels to DWC3 nodes
  ARM: dts: dra72x-evm: Enable CPSW and MDIO
  ARM: dts: dra7-evm: Keep all VDD rails always-on
  ARM: dts: dra72-evm: Add MMC nodes
  ARM: dts: dra72-evm: Add power button node
  ARM: dts: dra72-evm: Provide explicit pinmux for TPS PMIC
  ARM: dts: dra72-evm: Add regulator information to USB2 PHYs
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

1 files changed, 31 insertions, 4 deletions

diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index bc82a12d4c2c..08ef71fe5273 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -142,6 +142,33 @@
 		>;
 	};
 
+	gpmc_pins: pinmux_gpmc_pins {
+		pinctrl-single,pins = <
+
+			/* address lines */
+                        OMAP3_CORE1_IOPAD(0x207a, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a1.gpmc_a1 */
+                        OMAP3_CORE1_IOPAD(0x207c, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a2.gpmc_a2 */
+                        OMAP3_CORE1_IOPAD(0x207e, PIN_OUTPUT | MUX_MODE0)       /* gpmc_a3.gpmc_a3 */
+
+			/* data lines, gpmc_d0..d7 not muxable according to TRM */
+                        OMAP3_CORE1_IOPAD(0x209e, PIN_INPUT | MUX_MODE0)        /* gpmc_d8.gpmc_d8 */
+                        OMAP3_CORE1_IOPAD(0x20a0, PIN_INPUT | MUX_MODE0)        /* gpmc_d9.gpmc_d9 */
+                        OMAP3_CORE1_IOPAD(0x20a2, PIN_INPUT | MUX_MODE0)        /* gpmc_d10.gpmc_d10 */
+                        OMAP3_CORE1_IOPAD(0x20a4, PIN_INPUT | MUX_MODE0)        /* gpmc_d11.gpmc_d11 */
+                        OMAP3_CORE1_IOPAD(0x20a6, PIN_INPUT | MUX_MODE0)        /* gpmc_d12.gpmc_d12 */
+                        OMAP3_CORE1_IOPAD(0x20a8, PIN_INPUT | MUX_MODE0)        /* gpmc_d13.gpmc_d13 */
+                        OMAP3_CORE1_IOPAD(0x20aa, PIN_INPUT | MUX_MODE0)        /* gpmc_d14.gpmc_d14 */
+                        OMAP3_CORE1_IOPAD(0x20ac, PIN_INPUT | MUX_MODE0)        /* gpmc_d15.gpmc_d15 */
+
+			/*
+			 * gpmc_ncs0, gpmc_nadv_ale, gpmc_noe, gpmc_nwe, gpmc_wait0 not muxable
+			 * according to TRM. OneNAND seems to require PIN_INPUT on clock.
+			 */
+                        OMAP3_CORE1_IOPAD(0x20b0, PIN_OUTPUT | MUX_MODE0)       /* gpmc_ncs1.gpmc_ncs1 */
+                        OMAP3_CORE1_IOPAD(0x20be, PIN_INPUT | MUX_MODE0)        /* gpmc_clk.gpmc_clk */
+		>;
+	};
+
 	i2c1_pins: pinmux_i2c1_pins {
 		pinctrl-single,pins = <
 			0x18a (PIN_INPUT | MUX_MODE0)		/* i2c1_scl */
@@ -585,16 +612,16 @@
 };
 
 &gpmc {
-	ranges = <0 0 0x04000000 0x10000000>; /* 256MB */
 	ranges = <0 0 0x01000000 0x01000000>,	/* 16 MB for OneNAND */
 		 <1 0 0x02000000 0x01000000>;	/* 16 MB for smc91c96 */
+	pinctrl-names = "default";
+	pinctrl-0 = <&gpmc_pins>;
 
-	/* gpio-irq for dma: 65 */
-
+	/* sys_ndmareq1 could be used by the driver, not as gpio65 though */
 	onenand@0,0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
-		reg = <0 0 0x10000000>;
+		reg = <0 0 0x20000>;	/* CS0, offset 0, IO size 128K */
 
 		gpmc,sync-read;
 		gpmc,sync-write;