diff options
author | Lubomir Rintel <lkundrak@v3.sk> | 2020-03-20 20:41:03 +0300 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2020-03-24 14:27:29 +0300 |
commit | ecd755fb730e627918146e3d04acbdeb01e1761f (patch) | |
tree | 5131bdb62f74b3ccd8d0bd8a4a4614ac59d244f5 /arch/arm/boot/dts/mmp2.dtsi | |
parent | c10419f94538b8a3fea7b08a28a98ba414bfdf74 (diff) | |
download | linux-ecd755fb730e627918146e3d04acbdeb01e1761f.tar.xz |
ARM: dts: mmp*: Make the serial ports compatible with xscale-uart
XScale serial port driver is perfectly capable of supporting this hardware. A
separate compatible string is probably a historical mess.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200320174107.29406-7-lkundrak@v3.sk
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/boot/dts/mmp2.dtsi')
-rw-r--r-- | arch/arm/boot/dts/mmp2.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi index 45372df0ec2a..da10567b5aca 100644 --- a/arch/arm/boot/dts/mmp2.dtsi +++ b/arch/arm/boot/dts/mmp2.dtsi @@ -209,7 +209,7 @@ }; uart1: serial@d4030000 { - compatible = "mrvl,mmp-uart"; + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; reg = <0xd4030000 0x1000>; interrupts = <27>; clocks = <&soc_clocks MMP2_CLK_UART0>; @@ -219,7 +219,7 @@ }; uart2: serial@d4017000 { - compatible = "mrvl,mmp-uart"; + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; reg = <0xd4017000 0x1000>; interrupts = <28>; clocks = <&soc_clocks MMP2_CLK_UART1>; @@ -229,7 +229,7 @@ }; uart3: serial@d4018000 { - compatible = "mrvl,mmp-uart"; + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; reg = <0xd4018000 0x1000>; interrupts = <24>; clocks = <&soc_clocks MMP2_CLK_UART2>; @@ -239,7 +239,7 @@ }; uart4: serial@d4016000 { - compatible = "mrvl,mmp-uart"; + compatible = "mrvl,mmp-uart", "intel,xscale-uart"; reg = <0xd4016000 0x1000>; interrupts = <46>; clocks = <&soc_clocks MMP2_CLK_UART3>; |