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authorXiaowei Bao <xiaowei.bao@nxp.com>2018-11-05 11:46:49 +0300
committerShawn Guo <shawnguo@kernel.org>2018-11-16 05:50:42 +0300
commit8ab9c127bf7235ad568c13e1525ea6e8f4f3a0ef (patch)
tree1d7ea023a8f4cdb2f44060781bac31cab28beea8 /arch/arm/boot/dts/ls1021a.dtsi
parent7dd9c42f2668821141690346ca58ecffdaa281f0 (diff)
downloadlinux-8ab9c127bf7235ad568c13e1525ea6e8f4f3a0ef.tar.xz
ARM: dts: ls1021a: Add the status property disable PCIe
Add the status property disable the PCIe, the property will be enable by bootloader. Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/ls1021a.dtsi')
-rw-r--r--arch/arm/boot/dts/ls1021a.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi
index bdd6e66a79ad..b769e0e40553 100644
--- a/arch/arm/boot/dts/ls1021a.dtsi
+++ b/arch/arm/boot/dts/ls1021a.dtsi
@@ -736,6 +736,7 @@
<0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
pcie@3500000 {
@@ -759,6 +760,7 @@
<0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
<0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
};
can0: can@2a70000 {