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| author | Sylvain Lemieux <slemieux@tycoint.com> | 2016-09-08 20:47:53 +0300 |
|---|---|---|
| committer | Sylvain Lemieux <slemieux@tycoint.com> | 2016-10-25 20:29:31 +0300 |
| commit | 1754906fffcabdd166f6aec85eb9a3a28de531b8 (patch) | |
| tree | 2463d16196f049ec1e98f442e56cbbcf2a5feb0d /arch/arm/boot/dts/lpc32xx.dtsi | |
| parent | 1001354ca34179f3db924eb66672442a173147dc (diff) | |
| download | linux-1754906fffcabdd166f6aec85eb9a3a28de531b8.tar.xz | |
ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2
The change setup the peripheral clock (PERIPH_CLK) as the default
parent clock for PWM1 & PWM2.
Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Diffstat (limited to 'arch/arm/boot/dts/lpc32xx.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/lpc32xx.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/lpc32xx.dtsi b/arch/arm/boot/dts/lpc32xx.dtsi index b5841fab51c1..d81fe433e3c8 100644 --- a/arch/arm/boot/dts/lpc32xx.dtsi +++ b/arch/arm/boot/dts/lpc32xx.dtsi @@ -479,6 +479,8 @@ compatible = "nxp,lpc3220-pwm"; reg = <0x4005C000 0x4>; clocks = <&clk LPC32XX_CLK_PWM1>; + assigned-clocks = <&clk LPC32XX_CLK_PWM1>; + assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>; status = "disabled"; }; @@ -486,6 +488,8 @@ compatible = "nxp,lpc3220-pwm"; reg = <0x4005C004 0x4>; clocks = <&clk LPC32XX_CLK_PWM2>; + assigned-clocks = <&clk LPC32XX_CLK_PWM2>; + assigned-clock-parents = <&clk LPC32XX_CLK_PERIPH>; status = "disabled"; }; |