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| author | Russell King <rmk+kernel@armlinux.org.uk> | 2020-04-15 18:44:17 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-04-29 05:43:33 +0300 |
| commit | 86b08bd5b99480b79a25343f24c1b8c4ddcb5c09 (patch) | |
| tree | ed409c728a8039224b0140e4b23738c15adf1393 /arch/arm/boot/dts/imx6qdl-sr-som.dtsi | |
| parent | 592a8191f05805bc10aa875509bec64d565df931 (diff) | |
| download | linux-86b08bd5b99480b79a25343f24c1b8c4ddcb5c09.tar.xz | |
ARM: dts: imx6-sr-som: add ethernet PHY configuration
Add ethernet PHY configuration ahead of removing the quirk that
configures the clocking mode for the PHY. The RGMII delay is
already set correctly.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sr-som.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-sr-som.dtsi | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi index 6d7f6b9035bc..b06577808ff4 100644 --- a/arch/arm/boot/dts/imx6qdl-sr-som.dtsi +++ b/arch/arm/boot/dts/imx6qdl-sr-som.dtsi @@ -53,10 +53,21 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_microsom_enet_ar8035>; + phy-handle = <&phy>; phy-mode = "rgmii-id"; phy-reset-duration = <2>; phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + phy: ethernet-phy@0 { + reg = <0>; + qca,clk-out-frequency = <125000000>; + }; + }; }; &iomuxc { |