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authorLinus Walleij <linus.walleij@linaro.org>2017-01-28 23:15:15 +0300
committerLinus Walleij <linus.walleij@linaro.org>2017-03-24 21:08:03 +0300
commite3aeca1d74366a43d28e8c826ac48064f7287022 (patch)
treedff5be12ff7c33b8052359bd84afaee6ee2246a6 /arch/arm/boot/dts/gemini-sq201.dts
parent552c804afe9b7d843f5ffae165ca5543f89b5293 (diff)
downloadlinux-e3aeca1d74366a43d28e8c826ac48064f7287022.tar.xz
ARM: dts: add PCI to the Gemini device trees
The Cortina Gemini has an internal PCI root bus, add this to the device tree, and add interrupt mapping (swizzling) to the relevant systems device trees. Cc: Janos Laube <janos.dev@gmail.com> Cc: Paulius Zaleckas <paulius.zaleckas@gmail.com> Cc: Hans Ulli Kroll <ulli.kroll@googlemail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Feng-Hsin Chiang <john453@faraday-tech.com> Cc: Greentime Hu <green.hu@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/gemini-sq201.dts')
-rw-r--r--arch/arm/boot/dts/gemini-sq201.dts22
1 files changed, 22 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/gemini-sq201.dts b/arch/arm/boot/dts/gemini-sq201.dts
index dae2a70d8fbc..46309e79cc7b 100644
--- a/arch/arm/boot/dts/gemini-sq201.dts
+++ b/arch/arm/boot/dts/gemini-sq201.dts
@@ -92,5 +92,27 @@
read-only;
};
};
+
+ pci@50000000 {
+ status = "okay";
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map =
+ <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
+ <0x4800 0 0 2 &pci_intc 1>,
+ <0x4800 0 0 3 &pci_intc 2>,
+ <0x4800 0 0 4 &pci_intc 3>,
+ <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
+ <0x5000 0 0 2 &pci_intc 2>,
+ <0x5000 0 0 3 &pci_intc 3>,
+ <0x5000 0 0 4 &pci_intc 0>,
+ <0x5800 0 0 1 &pci_intc 2>, /* Slot 11 */
+ <0x5800 0 0 2 &pci_intc 3>,
+ <0x5800 0 0 3 &pci_intc 0>,
+ <0x5800 0 0 4 &pci_intc 1>,
+ <0x6000 0 0 1 &pci_intc 3>, /* Slot 12 */
+ <0x6000 0 0 2 &pci_intc 0>,
+ <0x6000 0 0 3 &pci_intc 1>,
+ <0x6000 0 0 4 &pci_intc 2>;
+ };
};
};