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| author | Jiri Kosina <jkosina@suse.cz> | 2020-12-16 13:41:05 +0300 |
|---|---|---|
| committer | Jiri Kosina <jkosina@suse.cz> | 2020-12-16 13:41:05 +0300 |
| commit | e77bc7dc9af0ec53996367b2053dfafee83b7edb (patch) | |
| tree | 7850cb0cc9e0d7308992b2b983052c5f209245bd /arch/arm/boot/dts/exynos4412-origen.dts | |
| parent | 105856b36c0cefc2fa1c1e649d75da71e2e38c31 (diff) | |
| parent | 82514ecd61435c2d47c235e1343872b38db17be4 (diff) | |
| download | linux-e77bc7dc9af0ec53996367b2053dfafee83b7edb.tar.xz | |
Merge branch 'for-5.11/elecom' into for-linus
- support for EX-G M-XGL20DLBK device, from YOSHIOKA Takuma
Diffstat (limited to 'arch/arm/boot/dts/exynos4412-origen.dts')
| -rw-r--r-- | arch/arm/boot/dts/exynos4412-origen.dts | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos4412-origen.dts b/arch/arm/boot/dts/exynos4412-origen.dts index 8b11ad391252..c2e793b69e7d 100644 --- a/arch/arm/boot/dts/exynos4412-origen.dts +++ b/arch/arm/boot/dts/exynos4412-origen.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "exynos4412.dtsi" +#include <dt-bindings/clock/samsung,s2mps11.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/input/input.h> #include "exynos-mfc-reserved-memory.dtsi" @@ -74,6 +75,21 @@ cpu0-supply = <&buck2_reg>; }; +&cpu_thermal { + cooling-maps { + cooling_map0: map0 { + /* Corresponds to 800MHz at freq_table */ + cooling-device = <&cpu0 7 7>, <&cpu1 7 7>, + <&cpu2 7 7>, <&cpu3 7 7>; + }; + cooling_map1: map1 { + /* Corresponds to 200MHz at freq_table */ + cooling-device = <&cpu0 13 13>, <&cpu1 13 13>, + <&cpu2 13 13>, <&cpu3 13 13>; + }; + }; +}; + &exynos_usbphy { status = "okay"; }; @@ -129,6 +145,13 @@ <1200000>, <1200000>, <1200000>, <1200000>; + s5m8767_osc: clocks { + compatible = "samsung,s5m8767-clk"; + #clock-cells = <1>; + clock-output-names = "s5m8767_ap", "s5m8767_cp", + "s5m8767_bt"; + }; + regulators { ldo1_reg: LDO1 { regulator-name = "VDD_ALIVE"; @@ -499,6 +522,8 @@ &rtc { status = "okay"; + clocks = <&clock CLK_RTC>, <&s5m8767_osc S2MPS11_CLK_AP>; + clock-names = "rtc", "rtc_src"; }; &sdhci_2 { |