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authorOlof Johansson <olof@lixom.net>2016-11-19 05:01:09 +0300
committerOlof Johansson <olof@lixom.net>2016-11-19 05:01:09 +0300
commitb4cf33e96aea01225797da0f7f50df2ebfc830a3 (patch)
tree453c87b99e97cfac972d9217324ab811f3d249bd /arch/arm/boot/dts/exynos4210.dtsi
parenta90a6f9c3dd6055d01d2cd770e68b9abe4c6d9ea (diff)
parent04a886727ca7e841afa2fbc5d87aff81ae256dbf (diff)
downloadlinux-b4cf33e96aea01225797da0f7f50df2ebfc830a3.tar.xz
Merge tag 'samsung-dt-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt
Topic branch with DT changes for v4.10. Fix invalid GIC interrupt flags - type IRQ_TYPE_NONE is not allowed for GIC interrupts. Although this was working but with error messages like: genirq: Setting trigger mode 0 for irq 16 failed Use level high interrupt instead of type none. The choice of level high was rather an arbitrary decision hoping it will work on each platform. Tests shown no issues so far. * tag 'samsung-dt-gic-flags-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos5440 ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos5260 ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos5 ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos4 ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos3250 ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5440 ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5260 ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5410/exynos542x ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5250 ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5 ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos3250 ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4x12 ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4210 ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos4 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/boot/dts/exynos4210.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi36
1 files changed, 24 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 2d9b02967105..7f3a18c8f60f 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -109,12 +109,12 @@
#interrupt-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
- interrupt-map = <0 &gic 0 57 0>,
- <1 &gic 0 69 0>,
+ interrupt-map = <0 &gic 0 57 IRQ_TYPE_LEVEL_HIGH>,
+ <1 &gic 0 69 IRQ_TYPE_LEVEL_HIGH>,
<2 &combiner 12 6>,
<3 &combiner 12 7>,
- <4 &gic 0 42 0>,
- <5 &gic 0 48 0>;
+ <4 &gic 0 42 IRQ_TYPE_LEVEL_HIGH>,
+ <5 &gic 0 48 IRQ_TYPE_LEVEL_HIGH>;
};
};
@@ -127,18 +127,18 @@
pinctrl_0: pinctrl@11400000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x11400000 0x1000>;
- interrupts = <0 47 0>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};
pinctrl_1: pinctrl@11000000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x11000000 0x1000>;
- interrupts = <0 46 0>;
+ interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
wakup_eint: wakeup-interrupt-controller {
compatible = "samsung,exynos4210-wakeup-eint";
interrupt-parent = <&gic>;
- interrupts = <0 32 0>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
};
};
@@ -182,7 +182,7 @@
g2d: g2d@12800000 {
compatible = "samsung,s5pv210-g2d";
reg = <0x12800000 0x1000>;
- interrupts = <0 89 0>;
+ interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d";
power-domains = <&pd_lcd0>;
@@ -424,10 +424,22 @@
&combiner {
samsung,combiner-nr = <16>;
- interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
- <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
- <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
- <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
};
&mdma1 {