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authorEric Anholt <eric@anholt.net>2018-12-13 02:51:49 +0300
committerStefan Wahren <stefan.wahren@i2se.com>2019-02-01 12:34:16 +0300
commit81fc035f07d230c0f687ef09d5ecf2c885dba8ae (patch)
tree0d4fb69e3fd6cf0565f008554f8824a3b2b2233f /arch/arm/boot/dts/bcm283x.dtsi
parentf494caa480f7089ff9bba16dd865e190cee7e545 (diff)
downloadlinux-81fc035f07d230c0f687ef09d5ecf2c885dba8ae.tar.xz
ARM: bcm283x: Extend the WDT DT node out to cover the whole PM block. (v4)
It was covering part of the PM block's range, up to the WDT regs. To support the rest of the PM block's functionality, we need the full register range plus the AXI Async Bridge regs for PM sequencing. This doesn't convert any of the consumers over to the new binding yet, since we will need to be careful in coordinating our usage of firmware services that might power domains on and off versus the bcm2835-pm driver's access of those same domains. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm283x.dtsi')
-rw-r--r--arch/arm/boot/dts/bcm283x.dtsi13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/bcm283x.dtsi b/arch/arm/boot/dts/bcm283x.dtsi
index 31b29646b14c..20ed8b1da11b 100644
--- a/arch/arm/boot/dts/bcm283x.dtsi
+++ b/arch/arm/boot/dts/bcm283x.dtsi
@@ -121,8 +121,17 @@
};
watchdog@7e100000 {
- compatible = "brcm,bcm2835-pm-wdt";
- reg = <0x7e100000 0x28>;
+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
+ #power-domain-cells = <1>;
+ #reset-cells = <1>;
+ reg = <0x7e100000 0x114>,
+ <0x7e00a000 0x24>;
+ clocks = <&clocks BCM2835_CLOCK_V3D>,
+ <&clocks BCM2835_CLOCK_PERI_IMAGE>,
+ <&clocks BCM2835_CLOCK_H264>,
+ <&clocks BCM2835_CLOCK_ISP>;
+ clock-names = "v3d", "peri_image", "h264", "isp";
+ system-power-controller;
};
clocks: cprman@7e101000 {