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authorJoel Stanley <joel@jms.id.au>2019-10-16 05:48:57 +0300
committerJoel Stanley <joel@jms.id.au>2019-11-01 13:24:45 +0300
commit8bba55f74321b72a156e0c9b5cefe133b4eb479c (patch)
tree596e5dd689fc7738fc84d8cfaebe06e0820b542d /arch/arm/boot/dts/aspeed-g6.dtsi
parent37ece7e341e8c44ee9a7afe7277619a0ee377abe (diff)
downloadlinux-8bba55f74321b72a156e0c9b5cefe133b4eb479c.tar.xz
ARM: dts: aspeed-g6: Fix i2c clock source
The upstream clock for the I2C buses is APB2. Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Joel Stanley <joel@jms.id.au>
Diffstat (limited to 'arch/arm/boot/dts/aspeed-g6.dtsi')
-rw-r--r--arch/arm/boot/dts/aspeed-g6.dtsi34
1 files changed, 17 insertions, 17 deletions
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index 5c237adbad53..8ee90bf68679 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -527,13 +527,13 @@
#include "aspeed-g6-pinctrl.dtsi"
&i2c {
- i2c0: i2c-bus@40 {
+ i2c0: i2c-bus@80 {
#address-cells = <1>;
#size-cells = <0>;
#interrupt-cells = <1>;
reg = <0x80 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -548,7 +548,7 @@
#interrupt-cells = <1>;
reg = <0x100 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -563,7 +563,7 @@
#interrupt-cells = <1>;
reg = <0x180 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -578,7 +578,7 @@
#interrupt-cells = <1>;
reg = <0x200 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -593,7 +593,7 @@
#interrupt-cells = <1>;
reg = <0x280 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -608,7 +608,7 @@
#interrupt-cells = <1>;
reg = <0x300 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -623,7 +623,7 @@
#interrupt-cells = <1>;
reg = <0x380 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -638,7 +638,7 @@
#interrupt-cells = <1>;
reg = <0x400 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -653,7 +653,7 @@
#interrupt-cells = <1>;
reg = <0x480 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -668,7 +668,7 @@
#interrupt-cells = <1>;
reg = <0x500 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -683,7 +683,7 @@
#interrupt-cells = <1>;
reg = <0x580 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -698,7 +698,7 @@
#interrupt-cells = <1>;
reg = <0x600 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -713,7 +713,7 @@
#interrupt-cells = <1>;
reg = <0x680 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -728,7 +728,7 @@
#interrupt-cells = <1>;
reg = <0x700 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -743,7 +743,7 @@
#interrupt-cells = <1>;
reg = <0x780 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;
@@ -758,7 +758,7 @@
#interrupt-cells = <1>;
reg = <0x800 0x80>;
compatible = "aspeed,ast2600-i2c-bus";
- clocks = <&syscon ASPEED_CLK_APB1>;
+ clocks = <&syscon ASPEED_CLK_APB2>;
resets = <&syscon ASPEED_RESET_I2C>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
bus-frequency = <100000>;