diff options
author | Russell King <rmk+kernel@armlinux.org.uk> | 2017-01-02 18:27:26 +0300 |
---|---|---|
committer | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2017-01-05 15:59:16 +0300 |
commit | a14c2338948d8a076a57b709ea7a32fbf16ab367 (patch) | |
tree | deab8c517fa8196449d91d0d3edcd55413827213 /arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi | |
parent | aa09b30f1bfbd48e156e0a26e0739bada7b74bb8 (diff) | |
download | linux-a14c2338948d8a076a57b709ea7a32fbf16ab367.tar.xz |
ARM: dts: armada388-clearfog: move ethernet related nodes
Move the ethernet, buffer manager, and mdio nodes over to use label form
to reference the devices rather than replicating the device path.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi')
-rw-r--r-- | arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi | 76 |
1 files changed, 37 insertions, 39 deletions
diff --git a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi index 116f461d8f6a..213b1fb11e7c 100644 --- a/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi +++ b/arch/arm/boot/dts/armada-38x-solidrun-microsom.dtsi @@ -62,38 +62,6 @@ MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>; internal-regs { - ethernet@70000 { - pinctrl-0 = <&ge0_rgmii_pins>; - pinctrl-names = "default"; - phy = <&phy_dedicated>; - phy-mode = "rgmii-id"; - buffer-manager = <&bm>; - bm,pool-long = <0>; - bm,pool-short = <1>; - status = "okay"; - }; - - mdio@72004 { - /* - * Add the phy clock here, so the phy can be - * accessed to read its IDs prior to binding - * with the driver. - */ - pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>; - pinctrl-names = "default"; - - phy_dedicated: ethernet-phy@0 { - /* - * Annoyingly, the marvell phy driver - * configures the LED register, rather - * than preserving reset-loaded setting. - * We undo that rubbish here. - */ - marvell,reg-init = <3 16 0 0x101e>; - reg = <0>; - }; - }; - rtc@a3800 { /* * If the rtc doesn't work, run "date reset" @@ -107,16 +75,46 @@ pinctrl-names = "default"; status = "okay"; }; - - bm@c8000 { - status = "okay"; - }; }; + }; +}; - bm-bppi { - status = "okay"; - }; +&bm { + status = "okay"; +}; + +&bm_bppi { + status = "okay"; +}; + +ð0 { + /* ethernet@70000 */ + pinctrl-0 = <&ge0_rgmii_pins>; + pinctrl-names = "default"; + phy = <&phy_dedicated>; + phy-mode = "rgmii-id"; + buffer-manager = <&bm>; + bm,pool-long = <0>; + bm,pool-short = <1>; + status = "okay"; +}; + +&mdio { + /* + * Add the phy clock here, so the phy can be accessed to read its + * IDs prior to binding with the driver. + */ + pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>; + pinctrl-names = "default"; + phy_dedicated: ethernet-phy@0 { + /* + * Annoyingly, the marvell phy driver configures the LED + * register, rather than preserving reset-loaded setting. + * We undo that rubbish here. + */ + marvell,reg-init = <3 16 0 0x101e>; + reg = <0>; }; }; |