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author | Vineet Gupta <vgupta@synopsys.com> | 2015-02-06 18:44:57 +0300 |
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committer | Vineet Gupta <vgupta@synopsys.com> | 2015-10-29 16:11:30 +0300 |
commit | 5a364c2a1762e8a78721fafc93144509c0b6cb84 (patch) | |
tree | dc74e67f8908cbfe0c5753515c8097339d55dc80 /arch/arc/include/asm/mmu.h | |
parent | 25d464183ca3522ae27ec1bbef5ddcbbbef65017 (diff) | |
download | linux-5a364c2a1762e8a78721fafc93144509c0b6cb84.tar.xz |
ARC: mm: PAE40 support
This is the first working implementation of 40-bit physical address
extension on ARCv2.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/include/asm/mmu.h')
-rw-r--r-- | arch/arc/include/asm/mmu.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arc/include/asm/mmu.h b/arch/arc/include/asm/mmu.h index 0f9c3eb5327e..b144d7ca7d20 100644 --- a/arch/arc/include/asm/mmu.h +++ b/arch/arc/include/asm/mmu.h @@ -24,6 +24,7 @@ #if (CONFIG_ARC_MMU_VER < 4) #define ARC_REG_TLBPD0 0x405 #define ARC_REG_TLBPD1 0x406 +#define ARC_REG_TLBPD1HI 0 /* Dummy: allows code sharing with ARC700 */ #define ARC_REG_TLBINDEX 0x407 #define ARC_REG_TLBCOMMAND 0x408 #define ARC_REG_PID 0x409 @@ -31,6 +32,7 @@ #else #define ARC_REG_TLBPD0 0x460 #define ARC_REG_TLBPD1 0x461 +#define ARC_REG_TLBPD1HI 0x463 #define ARC_REG_TLBINDEX 0x464 #define ARC_REG_TLBCOMMAND 0x465 #define ARC_REG_PID 0x468 @@ -83,6 +85,11 @@ void arc_mmu_init(void); extern char *arc_mmu_mumbojumbo(int cpu_id, char *buf, int len); void read_decode_mmu_bcr(void); +static inline int is_pae40_enabled(void) +{ + return IS_ENABLED(CONFIG_ARC_HAS_PAE40); +} + #endif /* !__ASSEMBLY__ */ #endif |