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authorIngo Molnar <mingo@kernel.org>2016-07-07 11:35:28 +0300
committerIngo Molnar <mingo@kernel.org>2016-07-07 11:35:28 +0300
commit4b4b20852d1009c5e8bc357b22353b62e3a241c7 (patch)
tree1026418471fe10c5b9f2fdff8a6b49bf070938fc /arch/arc/include/asm/entry-compact.h
parent5130213721d01b6632c255d4295a8102cbb58379 (diff)
parentf00c0afdfa625165a609513bc74164d56752ec3e (diff)
downloadlinux-4b4b20852d1009c5e8bc357b22353b62e3a241c7.tar.xz
Merge branch 'timers/fast-wheel' into timers/core
Diffstat (limited to 'arch/arc/include/asm/entry-compact.h')
-rw-r--r--arch/arc/include/asm/entry-compact.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arc/include/asm/entry-compact.h b/arch/arc/include/asm/entry-compact.h
index e0e1faf03c50..14c310f2e0b1 100644
--- a/arch/arc/include/asm/entry-compact.h
+++ b/arch/arc/include/asm/entry-compact.h
@@ -76,8 +76,8 @@
* We need to be a bit more cautious here. What if a kernel bug in
* L1 ISR, caused SP to go whaco (some small value which looks like
* USER stk) and then we take L2 ISR.
- * Above brlo alone would treat it as a valid L1-L2 sceanrio
- * instead of shouting alound
+ * Above brlo alone would treat it as a valid L1-L2 scenario
+ * instead of shouting around
* The only feasible way is to make sure this L2 happened in
* L1 prelogue ONLY i.e. ilink2 is less than a pre-set marker in
* L1 ISR before it switches stack